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Merge tag 'gvt-fixes-2020-10-30' of https://github.com/intel/gvt-linux into drm-intel...
2020-08-19 Matt Roperdrm/i915: Update bw_buddy pagemask table
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-08-17 Matt Roperdrm/i915/kbl: Fix revision ID checks
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-08-17 Matt RoperRevert "drm/i915/rkl: Add Wa_14011224835 for PHY B...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-08-17 Matt Roperdrm/i915: Update bw_buddy pagemask table
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-08-17 Matt Roperdrm/i915/rkl: Add Wa_14011224835 for PHY B initialization
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-08-17 Matt Roperdrm/i915/rkl: Handle HTI
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-08-17 Matt Roperdrm/i915/rkl: Add DPLL4 support
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-08-17 Matt Roperdrm/i915/rkl: Add initial workarounds
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-08-17 Matt Roperdrm/i915/rkl: Handle new DPCLKA_CFGCR0 layout
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-06-26 Matt Roperdrm/i915: Extend Wa_14010685332 to all ICP+ PCH's
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-06-09 Matt Roperdrm/i915/rkl: Update TGP's pin mapping when paired...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-06-09 Matt Roperdrm/i915/rkl: RKL uses ABOX0 for pixel transfers
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-06-06 Matt Roperdrm/i915: Restore DP-E to VBT mapping table
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-06-04 Matt Roperdrm/i915/rkl: Don't try to access transcoder D
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-06-04 Matt Roperdrm/i915/rkl: Setup ports/phys
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-06-04 Matt Roperdrm/i915/rkl: Handle comp master/slave relationships...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-06-04 Matt Roperdrm/i915/rkl: Add DDC pin mapping
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-06-04 Matt Roperdrm/i915/rkl: Set transcoder mask properly
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-05-20 Matt Roperdrm/i915/rkl: RKL only uses PHY_MISC for PHY's A and B
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-05-20 Matt Roperdrm/i915/rkl: Add power well support
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-05-20 Matt Roperdrm/i915/rkl: Limit number of universal planes to 5
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-05-20 Matt Roperdrm/i915/rkl: Update memory bandwidth parameters
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-05-20 Matt Roperx86/gpu: add RKL stolen memory support
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-05-20 Matt Roperdrm/i915/rkl: Add PCH support
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-05-20 Matt Roperdrm/i915/rkl: Load DMC firmware for Rocket Lake
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-05-20 Matt Roperdrm/i915/rkl: Re-use TGL GuC/HuC firmware
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-05-20 Matt Roperdrm/i915/rkl: Add RKL platform info and PCI ids
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-05-05 Matt Roperdrm/i915/icp: Add Wa_14010685332
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-04-28 Matt Roperdrm/i915: Use proper fault mask in interrupt postinstall too
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-04-27 Matt Roperdrm/i915: Use proper fault mask in interrupt postinstall too
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-04-21 Matt Roperdrm/i915: Use single set of AUX powerwell ops for gen11+
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-04-20 Matt Roperdrm/i915/tgl: TBT AUX should use TC power well ops
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-04-20 Matt Roperdrm/i915/tgl: Add Wa_14010477008:tgl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-04-17 Matt Roperdrm/i915/tgl: TBT AUX should use TC power well ops
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-04-15 Matt Roperdrm/i915/tgl: Initialize multicast register steering...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-04-15 Matt Roperdrm/i915/tgl: Extend Wa_1409767108:tgl to B0 stepping
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-04-15 Matt Roperdrm/i915/tgl: Add Wa_14010477008:tgl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-03-16 Matt Roperdrm/i915: Handle all MCR ranges
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-03-13 Matt Roperdrm/i915: Add Wa_1605460711 / Wa_1408767742 to ICL...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-03-13 Matt Roperdrm/i915: Apply Wa_1406680159:icl,ehl as an engine...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-03-13 Matt Roperdrm/i915: Add Wa_1406306137:icl,ehl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-03-13 Matt Roperdrm/i915: Add Wa_1604278689:icl,ehl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-03-13 Matt Roperdrm/i915: Add Wa_1209644611:icl,ehl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-03-13 Matt Roperdrm/i915: Handle all MCR ranges
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-03-09 Matt Roperdrm/i915/tgl: Don't treat unslice registers as masked
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-03-04 Matt Roperdrm/i915/ehl: Check PHY type before reading DPLL frequency
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-03-02 Matt Roperdrm/i915/tgl: Add Wa_22010178259:tgl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-03-02 Matt Roperdrm/i915: Program MBUS with rmw during initialization
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-02-26 Matt Roperdrm/i915/tgl: Allow DC5/DC6 entry while PG2 is active
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-02-21 Matt Roperdrm/i915/tgl: Add Wa_22010178259:tgl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-02-20 Matt Roperdrm/i915/tgl: Program MBUS_ABOX{1,2}_CTL during display...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-02-20 Matt Roperdrm/i915: Program MBUS with rmw during initialization
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-02-17 Matt Roperdrm/i915/ehl: Update port clock voltage level requirements
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-02-10 Matt Roperdrm/i915/tgl: Update cdclk voltage level settings
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-02-10 Matt Roperdrm/i915/ehl: Update port clock voltage level requirements
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-01-14 Matt Roperdrm/i915/gen11: Add additional pcode status values
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-01-07 Matt Roperdrm/i915: Add Wa_1407352427:icl,ehl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-01-07 Matt Roperdrm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2020-01-01 Matt Roperdrm/i915: Add Wa_1407352427:icl,ehl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-31 Matt Roperdrm/i915/tgl: Assume future platforms will inherit...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-27 Matt Roperdrm/i915/tgl: Extend Wa_1408615072 to tgl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-27 Matt Roperdrm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-27 Matt Roperdrm/i915: Extend WaDisableDARBFClkGating to icl,ehl,tgl
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-16 Matt Roperdrm/i915/tgl: Drop Wa#1178
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-16 Matt Roperdrm/i915/ehl: Define EHL powerwells independently of ICL
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-13 Matt Roperdrm/i915/icl: Cleanup combo PHY aux power well handlers
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-13 Matt Roperdrm/i915/tgl: Drop Wa#1178
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-13 Matt Roperdrm/i915/ehl: Define EHL powerwells independently of ICL
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-10 Matt Roperdrm/i915/tgl: Program BW_BUDDY registers during display...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-03 Matt Roperdrm/i915/irq: Refactor gen11 display interrupt handling
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-03 Matt Roperdrm/i915/ehl: Make icp_digital_port_connected() use...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-02 Matt Roperdrm/i915: Program SHPD_FILTER_CNT on CNP+
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-02 Matt Roperdrm/i915/ehl: Make icp_digital_port_connected() use...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-12-02 Matt Roperdrm/i915: Handle SDEISR according to PCH rather than...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-11-25 Matt Roperdrm/i915/tgl: Add DKL PHY vswing table for HDMI
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-11-25 Matt Roperdrm/i915/ehl: Update voltage level checks
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-11-19 Matt Roperdrm/i915/tgl: Add DKL PHY vswing table for HDMI
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-11-19 Matt Roperdrm/i915/ehl: Update voltage level checks
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-11-18 Matt Roperdrm/i915/vbt: Handle generic DTD block
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-11-18 Matt Roperdrm/i915/vbt: Parse panel options separately from timing...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-11-13 Matt Roperdrm/i915/tgl: MOCS table update
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-11-13 Matt RoperRevert "drm/i915/ehl: Update MOCS table for EHL"
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-11-13 Matt Roperdrm/i915/tgl: MOCS table update
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-11-13 Matt RoperRevert "drm/i915/ehl: Update MOCS table for EHL"
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-11-07 Matt Roperdrm/i915: Expand documentation for gen12 DP pre-enable...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-10-29 Matt Roperdrm/i915: Provide more information on DP AUX failures
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-10-29 Matt Roperdrm/i915/tgl: Add AUX B & C to DC_OFF_POWER_DOMAINS
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-10-29 Matt Roperdrm/i915: Drop unused AUX register offsets
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-10-28 Matt Roperdrm/i915/tgl: Handle AUX interrupts for TC ports
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-10-24 Matt Roperdrm/i915: Catch GTT fault errors for gen11+ planes
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-10-16 Matt Roperdrm/i915: Introduce Jasper Lake PCH
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-10-16 Matt Roperdrm/i915/ehl: Don't forget to set TC long detect function
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-10-09 Matt Roperdrm/i915/cml: Add second PCH ID for CMP
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-10-09 Matt Roperdrm/i915: Select DPLL's via mask
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-10-07 Matt Roperdrm/i915/vbt: Child device size remains unchanged through...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-09-26 Matt Roperdrm/i915: Small joiner RAM buffer size is platform...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-09-25 Matt Roperdrm: Destroy the correct mutex name in drm_dp_mst_topology_m...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-09-19 Matt Roperdrm/i915: Unify ICP and MCC hotplug pin tables
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-09-19 Matt Roperdrm/i915: Future-proof DDC pin mapping
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2019-09-18 Matt Roperdrm/i915/cml: Add second PCH ID for CMP
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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