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drm/i915/glk: Add Quirk for GLK NUC HDMI port issues.
2018-07-25 Clint Taylordrm/i915/glk: Add Quirk for GLK NUC HDMI port issues.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-07-12 Rodrigo ViviMerge tag 'gvt-fixes-2018-07-11' of https://github...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-07-09 Ville Syrjälädrm/i915: Fix hotplug irq ack on i965/g4x
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-05-09 Dhinakaran Pandiyandrm/i915/psr: Check if VBT says PSR can be enabled.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-05-08 Matt Atwooddrm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL...
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-05-08 Matt Atwooddrm/dp: Add DP_DPCD_REV_XX to drm_dp_helper
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-05-03 Rodrigo Vividrm/i915: Adjust eDP's logical vco in a reliable place.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...patch/msgid/20180502175255.5344-1-rodrigo.vivi@intel.com
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2018-05-02 Anusha Srivatsadrm/i915/firmware: Correct URL for firmware
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-28 Mahesh Kumardrm/i915/icl: update ddb entry start/end mask during...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-28 Mahesh Kumardrm/i915/icl: Enable 2nd DBuf slice only when needed
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-28 Mahesh Kumardrm/i915/icl: track dbuf slice-2 status
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-26 José Roberto de... drm/i915/psr/cnl: Set y-coordinate as valid in SDP
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-26 José Roberto de... drm/i915/debugfs: Print sink PSR status
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-26 José Roberto de... drm/i915/psr/skl+: Print information about what caused...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-26 osé Roberto de Souzadrm/i915/psr: Prevent PSR exit when a non-pipe related...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-23 Matt Atwooddrm/i915/kbl: Add KBL GT2 sku
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-20 Dhinakaran Pandiyandrm/i915/psr: Timestamps for PSR entry and exit interrupts.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-20 Dhinakaran Pandiyandrm/i915/psr: Control PSR interrupts via debugfs
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-20 Ville Syrjälädrm/i915: Enable edp psr error interrupts on bdw+
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-20 Daniel Vetterdrm/i915: Enable edp psr error interrupts on hsw
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-04 Ramalingam Cdrm/i915: Check hdcp key loadability
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-04 Ramalingam Cdrm/i915: Read Vprime thrice incase of mismatch
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-04-04 Ramalingam Cdrm/i915: Read HDCP R0 thrice in case of mismatch
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-30 Rodrigo ViviMerge airlied/drm-next into drm-intel-next-queued
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-30 José Roberto de... drm/i915/psr: Set DPCD PSR2 enable bit when needed
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-30 José Roberto de... drm/i915/psr: Cache sink synchronization latency
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-30 José Roberto de... drm/i915/psr: Use PSR2 macro for PSR2
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-30 José Roberto de... drm/i915/psr: Do not override PSR2 sink support
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-30 José Roberto de... drm/i915/psr/cnl: Enable Y-coordinate support in source
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-30 José Roberto de... drm/i915/psr: Tie PSR2 support to Y coordinate requirement
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-30 José Roberto de... drm/i915/psr: Nuke aux frame sync
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-30 José Roberto de... drm: Add DP last received PSR SDP VSC register and...
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-30 José Roberto de... drm: Add DP PSR2 sink enable bit
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-27 Lucas De Marchidrm/i915: reorder dpll_info members
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-27 Lucas De Marchidrm/i915: use flags from dpll_info embedded in intel_shared_dpll
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-27 Lucas De Marchidrm/i915: use id from intel_shared_dpll.info
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-27 Lucas De Marchidrm/i915: use name from intel_shared_dpll.info
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-27 Lucas De Marchidrm/i915: use funcs from intel_shared_dpll.info
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-27 Lucas De Marchidrm/i915: add dpll_info inside intel_shared_dpll
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-27 Lucas De Marchidrm/i915: move dpll_info to header
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-27 Lucas De Marchidrm/i915: Reword warning for missing cases
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-21 Dhinakaran Pandiyandrm/i915/psr: Remove open-coded PSR AUX transactions...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-21 Dhinakaran Pandiyandrm/i915/psr: Move PSR aux setup to it's own function.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-21 Chris Wilsondrm/i915: Specify which engines to reset following...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-19 Dhinakaran Pandiyandrm/i915/dp: Write to SET_POWER dpcd to enable MST...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-15 Rodrigo ViviMerge tag 'gvt-fixes-2018-03-15' of https://github...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-15 Michal Wajdeczkodrm/i915/guc: Fix build break on config without DEBUG_FS
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-14 Mahesh Kumardrm/i915/cnl: Kill _MMIO_PORT6 macro
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-14 Mahesh Kumardrm/i915/cnl; Add macro to get PORT_TX register
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-13 Dhinakaran Pandiyandrm/i915/psr: Comment to clarify SRD_DEBUG is called...
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-13 Rodrigo Vividrm/i915: Move CUR SURFLIVE definition to a better...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...patch/msgid/20180312210528.7905-1-rodrigo.vivi@intel.com
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2018-03-13 Dhinakaran Pandiyandrm/i915/psr: Remove PSR active flag from debugfs
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-13 Rodrigo Vividrm/i915/psr: Use more PSR HW tracking.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-13 Dhinakaran Pandiyandrm/i915/frontbuffer: HW tracking for cursor moves...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-13 Dhinakaran Pandiyandrm/i915/frontbuffer: Pull frontbuffer_flush out of...
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-12 Rodrigo Vividrm/i915/psr: Display WA 0884 applied broadly for more...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...msgid/20180309005218.26772-1-rodrigo.vivi@intel.com
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2018-03-12 Chris Wilsondrm/i915: Kick the rps worker when changing the boost...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-12 Chris Wilsondrm/i915: Only prune fences after wait-for-all
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-12 Mustamin B Mustaffadrm/i915: Enable VBT based BL control for DP
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-07 Rodrigo Vividrm/i915/cnl: Add Wa_2201832410
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...patch/msgid/20180307220912.3681-1-rodrigo.vivi@intel.com
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2018-03-06 Rodrigo Vividrm/i915/cnp: Document WaSouthDisplayDisablePWMCGEGating
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...msgid/20180306012812.19779-1-rodrigo.vivi@intel.com
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2018-03-06 Rodrigo Vividrm/i915/cnl: document WaVFUnitClockGatingDisable
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...msgid/20180306012000.18928-1-rodrigo.vivi@intel.com
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2018-03-06 Dhinakaran Pandiyandrm/i915/psr: Update PSR2 resolution check for Cannonlake
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-06 Chris Wilsondrm/i915: Suspend submission tasklets around wedging
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-03-06 Lionel Landwerlindrm/i915/perf: fix perf stream opening lock
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-28 Tvrtko Ursulindrm/i915: Make global seqno known in i915_gem_request_execut...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-28 Chris Wilsondrm/i915: Clear the in-use marker on execbuf failure
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-28 Mahesh Kumardrm/i915/cnl: Fix PORT_TX_DW5/7 register address
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-28 Jani Nikuladrm/i915/audio: fix check for av_enc_map overflow
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-28 Daniele Ceraolo... drm/i915: Fix rsvd2 mask when out-fence is returned
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-27 Rodrigo Vividrm/i915/cnl: Add WaRsDisableCoarsePowerGating
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...patch/msgid/20180222200535.9290-1-rodrigo.vivi@intel.com
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2018-02-27 Rodrigo Vividrm/i915/psr: Don't avoid PSR when PSR2 conditions...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...msgid/20180227212913.14083-2-rodrigo.vivi@intel.com
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2018-02-27 Rodrigo Vividrm/i915/psr2: Fix max resolution supported.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...msgid/20180227212913.14083-1-rodrigo.vivi@intel.com
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2018-02-27 Dhinakaran Pandiyandrm/i915/psr: Check for power state control capability.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-27 Dhinakaran Pandiyandrm/i915/dp: Move comment about hw timeout to the right...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-27 Dhinakaran Pandiyandrm/i915/dp: Remove redundant sleep after AUX transaction...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-27 Dhinakaran Pandiyandrm/i915/psr: Check for the specific AUX_FRAME_SYNC...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-27 Dhinakaran Pandiyandrm/i915/psr: Extract PSR DPCD initialization and move...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-27 Dhinakaran Pandiyandrm/i915/frontbuffer: Mark frontbuffer flush and invalidate...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-27 Dhinakaran Pandiyandrm/i915/psr: New power domain for AUX IO.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Mahesh Kumardrm/i915/cnl: Fix PORT_TX_DW5/7 register address
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Dhinakaran Pandiyandrm/i915: Estimate and update missed vblanks.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Dhinakaran Pandiyandrm/vblank: Restoring vblank counts after device PM...
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Dhinakaran Pandiyandrm/vblank: Do not update vblank count if interrupts...
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Dhinakaran Pandiyandrm/atomic: Handle 64-bit return from drm_crtc_vblank_count()
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Dhinakaran Pandiyandrm/tegra: Handle 64-bit return from drm_crtc_vblank_count()
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Dhinakaran Pandiyandrm/radeon: Handle 64-bit return from drm_crtc_vblank_count()
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Dhinakaran Pandiyandrm/amdgpu: Handle 64-bit return from drm_crtc_vblank_count()
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Dhinakaran Pandiyandrm/i915: Handle 64-bit return from drm_crtc_vblank_count()
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Dhinakaran Pandiyandrm/i915/vblank: Make the vblank counter u64 -> u32...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Dhinakaran Pandiyandrm/vblank: Data type fixes for 64-bit vblank sequences.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-15 Rodrigo Vividrm/i915/cnl: Remove alpha_support protection
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...patch/msgid/20180214204205.4446-1-rodrigo.vivi@intel.com
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2018-02-15 Rodrigo Vividrm/i915/cnl: Sync PCI ID with Spec.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...msgid/20180208073219.27860-1-rodrigo.vivi@intel.com
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2018-02-14 Hans de Goededrm/i915: Fix DSI panels with v1 MIPI sequences without...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-14 Hans de Goededrm/i915: Free memdup-ed DSI VBT data structures on...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-14 Hans de Goededrm/i915: Add intel_bios_cleanup() function
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-14 Hans de Goededrm/i915/vlv: Add cdclk workaround for DSI
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-14 Rodrigo ViviMerge tag 'gvt-fixes-2018-02-14' of https://github...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-14 Chris Wilsondrm/i915/pmu: Fix building without CONFIG_PM
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2018-02-14 Tvrtko Ursulindrm/i915/pmu: Fix sleep under atomic in RC6 readout
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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