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Port the fix for Issue 17969 to Rel/2.1
2018-07-02
Carol Eidt
Port the fix for Issue 17969 to Rel/2.1
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2018-04-17
Carol Eidt
Fix extra register-dependency on mem-form cvtsd/s2ss
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2018-04-17
Carol Eidt
[Arm64] Disable SIMD in crossgen (added as part of...
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2018-04-10
Carol Eidt
Handle last uses that become contained
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2018-04-09
Carol Eidt
LSRA: remove last uses only at use point
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2018-04-05
Carol Eidt
formatting
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2018-04-05
Carol Eidt
Remove fgMorphLocalField invalid assert
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2018-04-04
Carol Eidt
Handle SIMD8/LONG recasts for LCL_FLD
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2018-03-30
Carol Eidt
GC info fix: correctly adjust argCnt
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2018-03-27
Carol Eidt
Fix comment
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2018-03-27
Carol Eidt
Fix comment in test.
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2018-03-26
Carol Eidt
Fix condition
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2018-03-22
Carol Eidt
ARM: correctly unassign constant double
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2018-03-22
Carol Eidt
ARM: Fix reg resolution for doubles
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2018-03-22
Carol Eidt
Fix release build
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2018-03-21
Carol Eidt
Remove REG_OPT_RSVD from LSRA's candidate masks if...
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2018-03-20
Carol Eidt
ARM: call compRsvdRegCheck later
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2018-03-14
Carol Eidt
Mark operands of dead FIELD_LIST as unused
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2018-03-10
Carol Eidt
Fix LSRA enregisterLocalVars
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2018-03-03
Carol Eidt
Don't force byte regs for indir address
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2018-02-22
Carol Eidt
Handle a restored double Interval at block boundary
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2018-02-21
Carol Eidt
LEA on rhs of block copy can't be contained
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2018-02-16
Carol Eidt
Don't set delayRegFree if no target
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2018-02-16
Carol Eidt
Correctly handle check for busy double reg
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2018-02-08
Carol Eidt
Check mismatched types for SIMD copy
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2018-02-06
Carol Eidt
Replace comment inadvertently removed
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2018-02-06
Carol Eidt
Disable prefetch instructions for LEGACY_BACKEND
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2018-02-02
Carol Eidt
Consider specialPutArgs for jitStressRegs
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2018-02-02
Carol Eidt
Add lsrabuild.cpp to jit.settings.targets
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2018-02-01
Carol Eidt
Fix Arm64 compile error
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2018-02-01
Carol Eidt
Refactor RefPosition and Interval Building
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2018-01-31
Carol Eidt
Fix encoding of RCPPS and RSQRTPS
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2018-01-25
Carol Eidt
Disable the ConvertToUInt intrinsics by removing them...
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2018-01-24
Carol Eidt
Disable FP to Unsigned Vector Conversions
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2018-01-23
Carol Eidt
Adjust minRegs for SELECT stress modes
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2018-01-18
Carol Eidt
PR Feedback
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2018-01-18
Carol Eidt
ARM: Fix morphing of struct passed on stack
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2018-01-11
Carol Eidt
Fix change to fgMorphBlockOperand
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2018-01-05
Carol Eidt
Refactor minRegCount and eliminate auto
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2018-01-04
Carol Eidt
Keep OBJ on mismatched struct assignment
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2018-01-03
Carol Eidt
Fix description of FeatureSIMD
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2017-12-21
Carol Eidt
LSRA: Replace operandToLocationInfoMap with a list
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2017-12-20
Carol Eidt
Fix the dump of LIR flags
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2017-12-19
Carol Eidt
Fix for armel double passed as long
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2017-12-19
Carol Eidt
Eliminate gtLsraInfo from GenTree
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2017-12-14
Carol Eidt
Lsra Documentation
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2017-12-06
Carol Eidt
Fix GT_FIELD_LIST double passed as int
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2017-12-01
Carol Eidt
Unmark unused fields as lvOnFrame
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2017-11-20
Carol Eidt
Set reg conflicts on contained IND
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2017-11-20
Carol Eidt
Re-enable tests disabled for #14665
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2017-11-12
Carol Eidt
ARMARCH: no cascaded adds in addr mode
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2017-11-06
Carol Eidt
ARM64: Fix two register selection issues
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2017-11-03
Carol Eidt
Formatting
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2017-11-03
Carol Eidt
Unassign both floats if assigning double
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2017-11-03
Carol Eidt
LSRA Dump: don't print unused regs
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2017-11-02
Carol Eidt
Fix copyOrMoveRegInUse
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2017-10-31
Carol Eidt
PR feedback & fix an error in `isRegInUse`
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2017-10-31
Carol Eidt
Fix checking for reg in use
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2017-10-29
Carol Eidt
Formatting & typo
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2017-10-28
Carol Eidt
Fix another overly agressive assert
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2017-10-26
Carol Eidt
Fix FixedReg assert
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2017-10-25
Carol Eidt
Avoid allocating IP0 and IP1
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2017-10-20
Carol Eidt
Fix Register selection refactor bugs
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2017-10-20
Carol Eidt
LSRA Arm64 consistent reg sets
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2017-10-18
Carol Eidt
Fix multiple issues in LSRA for TYP_DOUBLE:
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2017-10-17
Carol Eidt
Arm64: Use op2 type for LOCKADD
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2017-10-17
Carol Eidt
Refactor register selection heuristics
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2017-10-16
Carol Eidt
PR Feedback
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2017-10-13
Carol Eidt
Fix handling of SIMD12
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2017-10-11
Carol Eidt
Cleanup of Lowering & LsraInfo
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2017-09-27
Carol Eidt
Handle GT_SIMD in GenTree::Compare
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2017-09-18
Carol Eidt
Sane spill weights
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2017-09-14
Carol Eidt
Update test
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2017-09-14
Carol Eidt
Allow a RET_EXPR as a BYREF operand for SIMD intrinsics.
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2017-08-30
Carol Eidt
Fix a typo
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2017-08-30
Carol Eidt
Do TreeNodeInfoInit in buildIntervals
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2017-08-30
Carol Eidt
Support checking for HFA types in altjit
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2017-08-30
Carol Eidt
Assert that Nullcheck child is not contained
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2017-08-28
Carol Eidt
Fix NullCheck register modeling
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2017-08-27
Carol Eidt
An unused long needs to have dstCount of 0
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2017-08-25
Carol Eidt
PR Feedback and formatting
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2017-08-25
Carol Eidt
Move TreeNodeInfoInit to LinearScan
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2017-08-25
Carol Eidt
PR Feedback
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2017-08-25
Carol Eidt
Arm Containment Cleanup
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2017-08-24
Carol Eidt
Fix ARM issues with Containment
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2017-08-16
Carol Eidt
Move Containment Analysis to Lowering
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2017-08-02
Carol Eidt
Set Register Requirements for Mod/Div
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2017-07-28
Carol Eidt
RyuJIT Tutorial
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2017-07-17
Carol Eidt
Get rid of duplicate dump of def RefPositions
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2017-07-17
Carol Eidt
LSRA & dump cleanup
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2017-07-12
Carol Eidt
Remove unused GT_PHYSREGDST node
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2017-07-11
Carol Eidt
PR feedback
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2017-07-11
Carol Eidt
Extract Lowering of SIMD12 locals
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2017-07-11
Carol Eidt
Extract containment analysis
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2017-07-10
Carol Eidt
A couple more fixes to JitDump
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2017-07-07
Carol Eidt
Move StoreLoc type widening to Lowering
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2017-06-23
Carol Eidt
Mark lvDoNotEnregister lclVars as contained
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2017-06-23
Carol Eidt
# This is a combination of 2 commits.
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2017-06-22
Carol Eidt
Make lvaSetClass dump diffable
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2017-06-07
Carol Eidt
Make containedness explicit
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