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arm: socfpga: spl: enable sdram, timer and uart
2015-04-21
Dinh Nguyen
arm: socfpga: spl: enable sdram, timer and uart
Signed-off-by:
Dinh Nguyen
<dinguyen@opensource.altera.com>
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2015-04-21
Dinh Nguyen
arm: socfpga: add functions to bring sdram, timer,...
Signed-off-by:
Dinh Nguyen
<dinguyen@opensource.altera.com>
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2015-04-21
Dinh Nguyen
arm: socfpga: spl: Add CONFIG_SPL_MAX_SIZE to be 64KB
Signed-off-by:
Dinh Nguyen
<dinguyen@opensource.altera.com>
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2014-12-06
Dinh Nguyen
socfpga: correctly increment freeze_controller_base...
Signed-off-by:
Dinh Nguyen
<dinguyen@opensource.altera.com>
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2014-12-06
Dinh Nguyen
socfpga: add missing struct member fifo_triple_byte
Signed-off-by:
Dinh Nguyen
<dinguyen@opensource.altera.com>
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2014-12-06
Dinh Nguyen
arm: socfpga: set skew settings for ethernet phy
Signed-off-by:
Dinh Nguyen
<dinguyen@opensource.altera.com>
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2014-07-29
Dinh Nguyen
boards.cfg : Add maintainers entries for SOCFPGA
Signed-off-by:
Dinh Nguyen
<dinguyen@altera.com>
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2013-07-25
Dinh Nguyen
socfpga: Move board/socfpga_cyclone5 to board/socfpga
Signed-off-by:
Dinh Nguyen
<dinguyen@altera.com>
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2012-10-04
Dinh Nguyen
ARM: Add Altera SOCFPGA Cyclone5
Signed-off-by:
Dinh Nguyen
<dinguyen@altera.com>
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2012-10-03
Dinh Nguyen
ARM: kirkwood/orion5x: Use reset_cpu definition in...
Signed-off-by:
Dinh Nguyen
<dinguyen@altera.com>
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2012-07-11
Dinh Nguyen
net/designware: Consecutive writes to the same register...
Signed-off-by:
Dinh Nguyen
<dinguyen@altera.com>
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