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drm/i915/display: Do not zero past infoframes.vsc
2021-07-06 Kees Cookdrm/i915/display: Do not zero past infoframes.vsc
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-06-28 Thomas Hellströmdrm/i915: Reinstate the mmap ioctl for some platforms
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-06-28 Jani Nikuladrm/i915/dsc: abstract helpers to get bigjoiner primary...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-06-15 Chris Wilsondrm/i915/selftests: Reorder tasklet_disable vs local_bh_disable
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-05-26 Rodrigo ViviMerge drm/drm-next into drm-intel-next
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-05-18 Simon Rettbergdrm/i915/gt: Disable HiZ Raw Stall Optimization on...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-05-17 Rodrigo ViviMerge drm/drm-next into drm-intel-next
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-04-21 Rodrigo Vividrm/i915/dmc: Let's abstract the dmc path.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...msgid/20210421094406.2017733-1-rodrigo.vivi@intel.com
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2021-04-20 Dan Carpenterdrm/i915: fix an error code in intel_overlay_do_put_image()
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-04-20 Jason Ekstranddrm/i915/pm: Make the wm parameter of print_wm_latency...
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-04-20 Rodrigo ViviMerge tag 'gvt-fixes-2021-04-20' of https://github...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-04-19 Imre Deakdrm/i915: Fix modesetting in case of unexpected AUX...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-04-19 Rodrigo ViviMerge tag 'topic/intel-gen-to-ver-2021-04-19' of git...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-04-12 Hans de Goededrm/i915/display/vlv_dsi: Do not skip panel_pwr_cycle_delay...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-04-12 Ville Syrjälädrm/i915: Don't zero out the Y plane's watermarks
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-04-12 Lyude Pauldrm/i915/dpcd_bl: Don't try vesa interface unless specified...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-04-07 Takashi Iwaidrm/i915: Fix invalid access to ACPI _DSM objects
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-03-24 Imre Deakdrm/i915: Fix the GT fence revocation runtime PM logic
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-03-23 Jani Nikuladrm/i915/dsc: fix DSS CTL register usage for ICL DSI...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-03-23 Ville Syrjälädrm/i915: Fix enabled_planes bitmask
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-03-23 Imre Deakdrm/i915: Disable LTTPR support when the LTTPR rev...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-03-23 Imre Deakdrm/i915: Disable LTTPR support when the DPCD rev ...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-03-23 Imre Deakdrm/i915/ilk-glk: Fix link training on links with LTTPRs
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-23 Ville Syrjälädrm/i915: Nuke INTEL_OUTPUT_FORMAT_INVALID
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-23 Nathan Chancellordrm/i915: Enable -Wuninitialized
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-23 Rodrigo ViviMerge tag 'gvt-next-fixes-2021-02-22' of https://github...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-17 Chris Wilsondrm/i915/gt: Correct surface base address for renderclear
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-17 Ville Syrjälädrm/i915: Disallow plane x+w>stride on ilk+ with X...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-08 Tejas Upadhyaydrm/i915/rkl: Remove require_force_probe protection
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-08 Ville Syrjälädrm/i915: Reject 446-480MHz HDMI clock on GLK
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-08 Chris Wilsondrm/i915/gt: Flush before changing register state
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-08 Chris Wilsondrm/i915: Disable atomics in L3 for gen9
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-08 Chris Wilsondrm/i915/gem: Move freeze/freeze_late next to suspend...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-08 Dan Carpenterdrm/i915/gem: Fix oops in error handling code
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-08 Dan Carpenterdrm/i915/gvt: fix uninitialized return in intel_gvt_update_r...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-02-08 Chris Wilsondrm/i915: Restrict DRM_I915_DEBUG to developer builds
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-01-15 Rodrigo ViviMerge drm/drm-next into drm-intel-next
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-01-08 Rodrigo ViviMerge drm/drm-next into drm-intel-next
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2021-01-05 Rodrigo ViviMerge tag 'gvt-next-fixes-2020-12-25' of https://github...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-08 Chris Wilsondrm/i915/gt: Declare gen9 has 64 mocs entries!
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-08 Manasi Navaredrm/i915/display/dp: Compute the correct slice count...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-08 Colin Ian Kingdrm/i915: fix size_t greater or equal to zero comparison
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-08 Chris Wilsondrm/i915/gt: Cancel the preemption timeout on responding...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-08 Chris Wilsondrm/i915/gt: Ignore repeated attempts to suspend request...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-08 Chris Wilsondrm/i915/gem: Propagate error from cancelled submit...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-08 Dan Carpenterdrm/i915/gem: Check the correct variable in selftest
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-03 Chris Wilsondrm/i915/display: Defer initial modeset until after...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-03 Jani Nikuladrm/i915/display: return earlier from intel_modeset_init...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-03 Chris Wilsondrm/i915/gt: Limit frequency drop to RPe on parking
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-03 Venkata Ramana Nayanadrm/i915/gt: Retain default context state across shrinking
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-03 Chris Wilsondrm/i915/gt: Split the breadcrumb spinlock between...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-03 Chris Wilsondrm/i915/gt: Protect context lifetime with RCU
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-12-01 Chris Wilsondrm/i915/gt: Program mocs:63 for cache eviction on...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-24 Chris Wilsondrm/i915/gt: Free stale request on destroying the virtual...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-24 Chris Wilsondrm/i915/gt: Don't cancel the interrupt shadow too...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-24 Chris Wilsondrm/i915/gt: Track signaled breadcrumbs outside of...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-24 Chris Wilsondrm/i915/gt: Defer enabling the breadcrumb interrupt...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-24 Yan Zhaodrm/i915/gvt: correct a false comment of flag F_UNALIGN
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-24 Lionel Landwerlindrm/i915/perf: workaround register corruption in OATAILPTR
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-19 Chris Wilsondrm/i915/gt: Fixup tgl mocs for PTE tracking
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-19 Rodrigo ViviMerge tag 'gvt-fixes-2020-11-17' of https://github...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-19 Chris Wilsondrm/i915/gt: Remember to free the virtual breadcrumbs
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-19 Ville Syrjälädrm/i915: Handle max_bpc==16
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-16 Zhang Xiaoxudrm/i915/selftests: Fix wrong return value of perf_request_l...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-16 Zhang Xiaoxudrm/i915/selftests: Fix wrong return value of perf_series_en...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-16 Tvrtko Ursulindrm/i915: Avoid memory leak with more than 16 workarounds...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-16 Rodrigo Vividrm/i915/tgl: Fix Media power gate sequence.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...msgid/20201111072859.1186070-1-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-13 Venkata Sandeep... drm/i915: Correctly set SFC capability for video engines
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-13 Chris Wilsondrm/i915/gem: Pull phys pread/pwrite implementations...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-13 Matthew Aulddrm/i915/gem: Allow backends to override pread implementation
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Chris Wilsondrm/i915: Hold onto an explicit ref to i915_vma_work...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Chris Wilsondrm/i915/gt: Flush xcs before tgl breadcrumbs
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Chris Wilsondrm/i915/gt: Expose more parameters for emitting writes...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Imre Deakdrm/i915: Fix encoder lookup during PSR atomic check
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Chris Wilsondrm/i915/gt: Use the local HWSP offset during submission
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Chris Wilsondrm/i915/gem: Flush coherency domains on first set...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Rodrigo ViviMerge tag 'gvt-fixes-2020-10-30' of https://github...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-29 Ville Syrjälädrm/i915: Reject 90/270 degree rotated initial fbs
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-29 Ville Syrjälädrm/i915: Restore ILK-M RPS support
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-29 Matthew Aulddrm/i915/region: fix max size calculation
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-21 Chris Wilsondrm/i915: Drop runtime-pm assert from vgpu io accessors
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-21 Chris Wilsondrm/i915: Force VT'd workarounds when running as a...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-21 Chris Wilsondrm/i915: Exclude low pages (128KiB) of stolen from use
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-21 Chris Wilsondrm/i915/gt: Onion unwind for scratch page allocation...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915/gt: Wait for CSB entries on Tigerlake
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915/gt: Widen CSB pointer to u64 for the parsers
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915: Use the active reference on the vma while...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915/gt: Undo forced context restores after trivial...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915/gt: Delay execlist processing for tgl
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915/gem: Support parsing of oversize batches
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Ville Syrjälädrm/i915: Mark ininitial fb obj as WT on eLLC machines...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Ayaz A Siddiquidrm/i915/gt: Initialize reserved and unspecified MOCS...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Sean Pauldrm/i915/dp: Tweak initial dpcd backlight.enabled value
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-12 Ville Syrjälädrm/i915: Set all unused color plane offsets to ~0xfff...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-12 Ville Syrjälädrm/i915: Fix TGL DKL PHY DP vswing handling
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915: Avoid mixing integer types during batch copies
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915/gem: Always test execution status on closing...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915/gt: Always send a pulse down the engine after...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915: Cancel outstanding work after disabling heartbeats...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915/gem: Hold request reference for canceling...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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