From c77808c317e5d21f5d5d2c33bd682c2a8f36db25 Mon Sep 17 00:00:00 2001 From: SooChan Lim Date: Tue, 5 Aug 2014 08:52:19 +0900 Subject: [PATCH 02/10] add the initial source code Change-Id: Ib7b5b2847c3a6bb3b9e005bfc7b1c46fdcbe3494 --- COPYING | 18 + Makefile.am | 1 + autogen.sh | 12 + configure.ac | 71 +++ libtbm-exynos4412.manifest | 5 + packaging/libtbm-exynos4412.spec | 47 ++ src/Makefile.am | 11 + src/tbm_bufmgr_exynos4412.c | 1129 ++++++++++++++++++++++++++++++++++++++ 8 files changed, 1294 insertions(+) create mode 100644 COPYING create mode 100644 Makefile.am create mode 100644 autogen.sh create mode 100644 configure.ac create mode 100644 libtbm-exynos4412.manifest create mode 100644 packaging/libtbm-exynos4412.spec create mode 100644 src/Makefile.am create mode 100755 src/tbm_bufmgr_exynos4412.c diff --git a/COPYING b/COPYING new file mode 100644 index 0000000..52fd458 --- /dev/null +++ b/COPYING @@ -0,0 +1,18 @@ +Copyright (C) 2000 - 2012 Samsung Electronics co., Ltd. All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is fur- +nished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FIT- +NESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CON- +NECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. diff --git a/Makefile.am b/Makefile.am new file mode 100644 index 0000000..af437a6 --- /dev/null +++ b/Makefile.am @@ -0,0 +1 @@ +SUBDIRS = src diff --git a/autogen.sh b/autogen.sh new file mode 100644 index 0000000..904cd67 --- /dev/null +++ b/autogen.sh @@ -0,0 +1,12 @@ +#! /bin/sh + +srcdir=`dirname $0` +test -z "$srcdir" && srcdir=. + +ORIGDIR=`pwd` +cd $srcdir + +autoreconf -v --install || exit 1 +cd $ORIGDIR || exit $? + +$srcdir/configure --enable-maintainer-mode "$@" diff --git a/configure.ac b/configure.ac new file mode 100644 index 0000000..a0d26ed --- /dev/null +++ b/configure.ac @@ -0,0 +1,71 @@ +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# on the rights to use, copy, modify, merge, publish, distribute, sub +# license, and/or sell copies of the Software, and to permit persons to whom +# the Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +AC_PREREQ(2.60) +AC_INIT(libtbm-exynos4412, 1.0.0) +AC_USE_SYSTEM_EXTENSIONS +AC_CONFIG_SRCDIR([Makefile.am]) +AM_INIT_AUTOMAKE([dist-bzip2]) + +AM_CONFIG_HEADER([config.h]) + +AC_DISABLE_STATIC +AC_PROG_LIBTOOL +AC_PROG_CC + +AC_HEADER_STDC +AC_SYS_LARGEFILE +AC_FUNC_ALLOCA + +# Enable quiet compiles on automake 1.11. +m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])]) + +PKG_CHECK_MODULES(LIBDRM, libdrm) +PKG_CHECK_MODULES(LIBDRM_EXYNOS, libdrm_exynos) +PKG_CHECK_MODULES(LIBTBM, libtbm) + +AC_ARG_ENABLE(cachectrl, + AS_HELP_STRING([--enable-cache-crtl], + [Enable cache control (default: enable)]), + [CACHE_CTRL=$enableval], [CACHE_CTRL=yes]) + +if test "x$CACHE_CTRL" = xyes; then + AC_DEFINE(ENABLE_CACHECRTL, 1, [Enable cache control]) +fi + +LIBTBM_EXYNOS4412_CFLAGS="$LIBDRM_CFLAGS $LIBDRM_EXYNOS_CFLAGS $LIBTBM_CFLAGS " +LIBTBM_EXYNOS4412_LIBS="$LIBDRM_LIBS $LIBDRM_EXYNOS_LIBS $LIBTBM_LIBS " +AC_SUBST(LIBTBM_EXYNOS4412_CFLAGS) +AC_SUBST(LIBTBM_EXYNOS4412_LIBS) + +bufmgr_dir=${libdir#*/} +AC_SUBST(bufmgr_dir) + +AC_OUTPUT([ + Makefile + src/Makefile]) + +echo "" +echo "CFLAGS : $CFLAGS" +echo "LDFLAGS : $LDFLAGS" +echo "LIBTBM_EXYNOS4412_CFLAGS : $LIBTBM_EXYNOS4412_CFLAGS" +echo "LIBTBM_EXYNOS4412_LIBS : $LIBTBM_EXYNOS4412_LIBS" +echo "bufmgr_dir : $bufmgr_dir" +echo "" + diff --git a/libtbm-exynos4412.manifest b/libtbm-exynos4412.manifest new file mode 100644 index 0000000..97e8c31 --- /dev/null +++ b/libtbm-exynos4412.manifest @@ -0,0 +1,5 @@ + + + + + diff --git a/packaging/libtbm-exynos4412.spec b/packaging/libtbm-exynos4412.spec new file mode 100644 index 0000000..1ef54df --- /dev/null +++ b/packaging/libtbm-exynos4412.spec @@ -0,0 +1,47 @@ +Name: libtbm-exynos4412 +Version: 1.0.5 +Release: 1 +License: MIT +Summary: The exynos4412 tbm backend +Group: System/Libraries +ExcludeArch: i586 +Source0: %{name}-%{version}.tar.gz + +BuildRequires: pkgconfig(pthread-stubs) +BuildRequires: pkgconfig(libdrm) +BuildRequires: pkgconfig(libdrm_exynos) +BuildRequires: pkgconfig(libtbm) + +%description +descriptionion: Tizen Buffer manager backend module for exynos4412 + +%prep +%setup -q + +%build + +%reconfigure --prefix=%{_prefix} --libdir=%{_libdir}/bufmgr --disable-cachectrl \ + CFLAGS="${CFLAGS} -Wall -Werror" LDFLAGS="${LDFLAGS} -Wl,--hash-style=both -Wl,--as-needed" + +make %{?_smp_mflags} + +%install +rm -rf %{buildroot} +mkdir -p %{buildroot}/usr/share/license +cp -af COPYING %{buildroot}/usr/share/license/%{name} +%make_install + + +%post +if [ -f %{_libdir}/bufmgr/libtbm_default.so ]; then + rm -rf %{_libdir}/bufmgr/libtbm_default.so +fi +ln -s libtbm_exynos4412.so %{_libdir}/bufmgr/libtbm_default.so + +%postun -p /sbin/ldconfig + +%files +%manifest libtbm-exynos4412.manifest +%{_libdir}/bufmgr/libtbm_*.so* +/usr/share/license/%{name} + diff --git a/src/Makefile.am b/src/Makefile.am new file mode 100644 index 0000000..704e030 --- /dev/null +++ b/src/Makefile.am @@ -0,0 +1,11 @@ +AM_CFLAGS = \ + @LIBTBM_EXYNOS4412_CFLAGS@ \ + -I$(top_srcdir) \ + -I$(top_srcdir)/src + +libtbm_exynos4412_la_LTLIBRARIES = libtbm_exynos4412.la +libtbm_exynos4412_ladir = /${bufmgr_dir} +libtbm_exynos4412_la_LIBADD = @LIBTBM_EXYNOS4412_LIBS@ + +libtbm_exynos4412_la_SOURCES = \ + tbm_bufmgr_exynos4412.c diff --git a/src/tbm_bufmgr_exynos4412.c b/src/tbm_bufmgr_exynos4412.c new file mode 100755 index 0000000..259edee --- /dev/null +++ b/src/tbm_bufmgr_exynos4412.c @@ -0,0 +1,1129 @@ +/************************************************************************** + +libtbm_exynos4412 + +Copyright 2012 Samsung Electronics co., Ltd. All Rights Reserved. + +Contact: SooChan Lim , Sangjin Lee + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sub license, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. +IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR +ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "exynos_drm.h" +#include + +#define DEBUG +#define USE_DMAIMPORT +#define TBM_EXYNOS4412_LOG(...) fprintf (stderr, __VA_ARGS__) + +#ifdef DEBUG +static int bDebug = 0; +#define DBG(...) if(bDebug&0x1) TBM_EXYNOS4412_LOG (__VA_ARGS__) +#else +#define DBG(...) +#endif + +/* check condition */ +#define EXYNOS4412_RETURN_IF_FAIL(cond) {\ + if (!(cond)) {\ + TBM_EXYNOS4412_LOG ("[%s] : '%s' failed.\n", __FUNCTION__, #cond);\ + return;\ + }\ +} +#define EXYNOS4412_RETURN_VAL_IF_FAIL(cond, val) {\ + if (!(cond)) {\ + TBM_EXYNOS4412_LOG ("[%s] : '%s' failed.\n", __FUNCTION__, #cond);\ + return val;\ + }\ +} + +struct dma_buf_info { + unsigned long size; + unsigned int fence_supported; + unsigned int padding; +}; + +#define DMA_BUF_ACCESS_READ 0x1 +#define DMA_BUF_ACCESS_WRITE 0x2 +#define DMA_BUF_ACCESS_DMA 0x4 +#define DMA_BUF_ACCESS_MAX 0x8 + +#define DMA_FENCE_LIST_MAX 5 + +struct dma_buf_fence { + unsigned long ctx; + unsigned int type; +}; + +#define DMABUF_IOCTL_BASE 'F' +#define DMABUF_IOWR(nr, type) _IOWR(DMABUF_IOCTL_BASE, nr, type) + +#define DMABUF_IOCTL_GET_INFO DMABUF_IOWR(0x00, struct dma_buf_info) +#define DMABUF_IOCTL_GET_FENCE DMABUF_IOWR(0x01, struct dma_buf_fence) +#define DMABUF_IOCTL_PUT_FENCE DMABUF_IOWR(0x02, struct dma_buf_fence) + +typedef struct _tbm_bufmgr_exynos4412 *tbm_bufmgr_exynos4412; +typedef struct _tbm_bo_exynos4412 *tbm_bo_exynos4412; + +typedef struct _exynos4412_private +{ + int ref_count; +} PrivGem; + +/* tbm buffor object for exynos4412 */ +struct _tbm_bo_exynos4412 +{ + int fd; + + unsigned int name; /* FLINK ID */ + + unsigned int gem; /* GEM Handle */ + + unsigned int dmabuf; /* fd for dmabuf */ + + void *pBase; /* virtual address */ + + unsigned int size; + + unsigned int flags_exynos; + unsigned int flags_tbm; + + PrivGem* private; + + pthread_mutex_t mutex; + struct dma_buf_fence dma_fence[DMA_FENCE_LIST_MAX]; + int device; + int opt; +}; + +/* tbm bufmgr private for exynos4412 */ +struct _tbm_bufmgr_exynos4412 +{ + int fd; + int isLocal; + void* hashBos; + + int use_dma_fence; +}; + +char *STR_DEVICE[]= +{ + "DEF", + "CPU", + "2D", + "3D", + "MM" +}; + +char *STR_OPT[]= +{ + "NONE", + "RD", + "WR", + "RDWR" +}; + +static unsigned int +_get_exynos_flag_from_tbm (unsigned int ftbm) +{ + unsigned int flags = 0; + + if (ftbm & TBM_BO_SCANOUT) + flags |= EXYNOS_BO_CONTIG; + else + flags |= EXYNOS_BO_NONCONTIG; + + if (ftbm & TBM_BO_WC) + flags |= EXYNOS_BO_WC; + else if (ftbm & TBM_BO_NONCACHABLE) + flags |= EXYNOS_BO_NONCACHABLE; + else + flags |= EXYNOS_BO_CACHABLE; + + return flags; +} + +static unsigned int +_get_tbm_flag_from_exynos (unsigned int fexynos) +{ + unsigned int flags = 0; + + if (fexynos & EXYNOS_BO_NONCONTIG) + flags |= TBM_BO_DEFAULT; + else + flags |= TBM_BO_SCANOUT; + + if (fexynos & EXYNOS_BO_WC) + flags |= TBM_BO_WC; + else if (fexynos & EXYNOS_BO_CACHABLE) + flags |= TBM_BO_DEFAULT; + else + flags |= TBM_BO_NONCACHABLE; + + return flags; +} + +static unsigned int +_get_name (int fd, unsigned int gem) +{ + struct drm_gem_flink arg = {0,}; + + arg.handle = gem; + if (drmIoctl (fd, DRM_IOCTL_GEM_FLINK, &arg)) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d fail to get flink gem=%d\n", + getpid(), __FUNCTION__, __LINE__, gem); + return 0; + } + + return (unsigned int)arg.name; +} + +static tbm_bo_handle +_exynos4412_bo_handle (tbm_bo_exynos4412 bo_exynos4412, int device) +{ + tbm_bo_handle bo_handle; + memset (&bo_handle, 0x0, sizeof (uint64_t)); + + switch(device) + { + case TBM_DEVICE_DEFAULT: + case TBM_DEVICE_2D: + bo_handle.u32 = (uint32_t)bo_exynos4412->gem; + break; + case TBM_DEVICE_CPU: + if (!bo_exynos4412->pBase) + { + struct drm_exynos_gem_mmap arg = {0,}; + + arg.handle = bo_exynos4412->gem; + arg.size = bo_exynos4412->size; + if (drmCommandWriteRead (bo_exynos4412->fd, DRM_EXYNOS_GEM_MMAP, &arg, sizeof(arg))) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot usrptr gem=%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); + return (tbm_bo_handle) NULL; + } + bo_exynos4412->pBase = (void*)((uint32_t)arg.mapped); + } + + bo_handle.ptr = (void *)bo_exynos4412->pBase; + break; + case TBM_DEVICE_3D: +#ifdef USE_DMAIMPORT + if (bo_exynos4412->dmabuf) + { + bo_handle.u32 = (uint32_t)bo_exynos4412->dmabuf; + break; + } + + if (!bo_exynos4412->dmabuf) + { + struct drm_prime_handle arg = {0, }; + + arg.handle = bo_exynos4412->gem; + if (drmIoctl (bo_exynos4412->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg)) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot dmabuf=%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); + return (tbm_bo_handle) NULL; + } + bo_exynos4412->dmabuf = arg.fd; + } + + bo_handle.u32 = (uint32_t)bo_exynos4412->dmabuf; +#endif + break; + case TBM_DEVICE_MM: + if (!bo_exynos4412->dmabuf) + { + struct drm_prime_handle arg = {0, }; + + arg.handle = bo_exynos4412->gem; + if (drmIoctl (bo_exynos4412->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg)) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot dmabuf=%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); + return (tbm_bo_handle) NULL; + } + bo_exynos4412->dmabuf = arg.fd; + } + + bo_handle.u32 = (uint32_t)bo_exynos4412->dmabuf; + break; + default: + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Not supported device:%d\n", + getpid(), __FUNCTION__, __LINE__, device); + bo_handle.ptr = (void *) NULL; + break; + } + + return bo_handle; +} + +static int +_exynos4412_cache_flush (int fd, tbm_bo_exynos4412 bo_exynos4412, int flags) +{ +#ifdef ENABLE_CACHECRTL + struct drm_exynos_gem_cache_op cache_op = {0, }; + int ret; + + /* if bo_exynos4412 is null, do cache_flush_all */ + if(bo_exynos4412) + { + cache_op.flags = 0; + cache_op.usr_addr = (uint64_t)((uint32_t)bo_exynos4412->pBase); + cache_op.size = bo_exynos4412->size; + } + else + { + flags = TBM_CACHE_FLUSH_ALL; + cache_op.flags = 0; + cache_op.usr_addr = 0; + cache_op.size = 0; + } + + if (flags & TBM_CACHE_INV) + { + if(flags & TBM_CACHE_ALL) + cache_op.flags |= EXYNOS_DRM_CACHE_INV_ALL; + else + cache_op.flags |= EXYNOS_DRM_CACHE_INV_RANGE; + } + + if (flags & TBM_CACHE_CLN) + { + if(flags & TBM_CACHE_ALL) + cache_op.flags |= EXYNOS_DRM_CACHE_CLN_ALL; + else + cache_op.flags |= EXYNOS_DRM_CACHE_CLN_RANGE; + } + + if(flags & TBM_CACHE_ALL) + cache_op.flags |= EXYNOS_DRM_ALL_CACHES_CORES; + + ret = drmCommandWriteRead (fd, DRM_EXYNOS_GEM_CACHE_OP, &cache_op, sizeof(cache_op)); + if (ret) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d fail to flush the cache.\n", + getpid(), __FUNCTION__, __LINE__); + return 0; + } +#else + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "warning %s:%d fail to enable the cache flush.\n", + getpid(), __FUNCTION__, __LINE__); +#endif + return 1; +} + +static int +tbm_exynos4412_bo_size (tbm_bo bo) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, 0); + + tbm_bo_exynos4412 bo_exynos4412; + + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); + + return bo_exynos4412->size; +} + +static void * +tbm_exynos4412_bo_alloc (tbm_bo bo, int size, int flags) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, 0); + + tbm_bo_exynos4412 bo_exynos4412; + tbm_bufmgr_exynos4412 bufmgr_exynos4412; + unsigned int exynos_flags; + + bufmgr_exynos4412 = (tbm_bufmgr_exynos4412)tbm_backend_get_bufmgr_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bufmgr_exynos4412!=NULL, 0); + + bo_exynos4412 = calloc (1, sizeof(struct _tbm_bo_exynos4412)); + if (!bo_exynos4412) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d fail to allocate the bo private\n", + getpid(), __FUNCTION__, __LINE__); + return 0; + } + + exynos_flags = _get_exynos_flag_from_tbm (flags); + if((flags & TBM_BO_SCANOUT) && + size <= 4*1024) + { + exynos_flags |= EXYNOS_BO_NONCONTIG; + } + + struct drm_exynos_gem_create arg = {0, }; + arg.size = size; + arg.flags = exynos_flags; + if (drmCommandWriteRead(bufmgr_exynos4412->fd, DRM_EXYNOS_GEM_CREATE, &arg, sizeof(arg))) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot create bo(flag:%x, size:%d)\n", + getpid(), __FUNCTION__, __LINE__, arg.flags, (unsigned int)arg.size); + free (bo_exynos4412); + return 0; + } + + bo_exynos4412->fd = bufmgr_exynos4412->fd; + bo_exynos4412->gem = arg.handle; + bo_exynos4412->size = size; + bo_exynos4412->flags_tbm = flags; + bo_exynos4412->flags_exynos = exynos_flags; + bo_exynos4412->name = _get_name (bo_exynos4412->fd, bo_exynos4412->gem); + + pthread_mutex_init(&bo_exynos4412->mutex, NULL); + + if (bufmgr_exynos4412->use_dma_fence + && !bo_exynos4412->dmabuf) + { + struct drm_prime_handle arg = {0, }; + + arg.handle = bo_exynos4412->gem; + if (drmIoctl (bo_exynos4412->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg)) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot dmabuf=%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); + free (bo_exynos4412); + return 0; + } + bo_exynos4412->dmabuf = arg.fd; + } + + /* add bo to hash */ + PrivGem* privGem = calloc (1, sizeof(PrivGem)); + privGem->ref_count = 1; + if (drmHashInsert(bufmgr_exynos4412->hashBos, bo_exynos4412->name, (void *)privGem) < 0) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot insert bo to Hash(%d)\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->name); + } + + DBG ("[libtbm-exynos4412:%d] %s size:%d, gem:%d(%d), flags:%d(%d)\n", getpid(), + __FUNCTION__, bo_exynos4412->size, + bo_exynos4412->gem, bo_exynos4412->name, + flags, exynos_flags); + + return (void *)bo_exynos4412; +} + +static void +tbm_exynos4412_bo_free(tbm_bo bo) +{ + tbm_bo_exynos4412 bo_exynos4412; + tbm_bufmgr_exynos4412 bufmgr_exynos4412; + + if (!bo) + return; + + bufmgr_exynos4412 = (tbm_bufmgr_exynos4412)tbm_backend_get_bufmgr_priv(bo); + EXYNOS4412_RETURN_IF_FAIL (bufmgr_exynos4412!=NULL); + + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); + EXYNOS4412_RETURN_IF_FAIL (bo_exynos4412!=NULL); + + DBG ("[libtbm-exynos4412:%d] %s size:%d, gem:%d(%d)\n", + getpid(), __FUNCTION__, bo_exynos4412->size, bo_exynos4412->gem, bo_exynos4412->name); + + if (bo_exynos4412->pBase) + { + if (munmap(bo_exynos4412->pBase, bo_exynos4412->size) == -1) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d\n", + getpid(), __FUNCTION__, __LINE__); + } + } + + /* close dmabuf */ + if (bo_exynos4412->dmabuf) + { + close (bo_exynos4412->dmabuf); + bo_exynos4412->dmabuf = 0; + } + + /* delete bo from hash */ + PrivGem *privGem = NULL; + int ret; + + ret = drmHashLookup (bufmgr_exynos4412->hashBos, bo_exynos4412->name, (void**)&privGem); + if (ret == 0) + { + privGem->ref_count--; + if (privGem->ref_count == 0) + { + drmHashDelete (bufmgr_exynos4412->hashBos, bo_exynos4412->name); + free (privGem); + privGem = NULL; + } + } + else + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "warning %s:%d Cannot find bo to Hash(%d), ret=%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->name, ret); + } + + /* Free gem handle */ + struct drm_gem_close arg = {0, }; + memset (&arg, 0, sizeof(arg)); + arg.handle = bo_exynos4412->gem; + if (drmIoctl (bo_exynos4412->fd, DRM_IOCTL_GEM_CLOSE, &arg)) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d\n", + getpid(), __FUNCTION__, __LINE__); + } + + free (bo_exynos4412); +} + + +static void * +tbm_exynos4412_bo_import (tbm_bo bo, unsigned int key) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, 0); + + tbm_bufmgr_exynos4412 bufmgr_exynos4412; + tbm_bo_exynos4412 bo_exynos4412; + + bufmgr_exynos4412 = (tbm_bufmgr_exynos4412)tbm_backend_get_bufmgr_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bufmgr_exynos4412!=NULL, 0); + + struct drm_gem_open arg = {0, }; + struct drm_exynos_gem_info info = {0, }; + + arg.name = key; + if (drmIoctl(bufmgr_exynos4412->fd, DRM_IOCTL_GEM_OPEN, &arg)) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot open gem name=%d\n", + getpid(), __FUNCTION__, __LINE__, key); + return 0; + } + + info.handle = arg.handle; + if (drmCommandWriteRead(bufmgr_exynos4412->fd, + DRM_EXYNOS_GEM_GET, + &info, + sizeof(struct drm_exynos_gem_info))) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot get gem info=%d\n", + getpid(), __FUNCTION__, __LINE__, key); + return 0; + } + + bo_exynos4412 = calloc (1, sizeof(struct _tbm_bo_exynos4412)); + if (!bo_exynos4412) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d fail to allocate the bo private\n", + getpid(), __FUNCTION__, __LINE__); + return 0; + } + + bo_exynos4412->fd = bufmgr_exynos4412->fd; + bo_exynos4412->gem = arg.handle; + bo_exynos4412->size = arg.size; + bo_exynos4412->flags_exynos = info.flags; + bo_exynos4412->name = key; + bo_exynos4412->flags_tbm = _get_tbm_flag_from_exynos (bo_exynos4412->flags_exynos); + + if (!bo_exynos4412->dmabuf) + { + struct drm_prime_handle arg = {0, }; + + arg.handle = bo_exynos4412->gem; + if (drmIoctl (bo_exynos4412->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg)) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot dmabuf=%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); + free (bo_exynos4412); + return 0; + } + bo_exynos4412->dmabuf = arg.fd; + } + + /* add bo to hash */ + PrivGem *privGem = NULL; + int ret; + + ret = drmHashLookup (bufmgr_exynos4412->hashBos, bo_exynos4412->name, (void**)&privGem); + if (ret == 0) + { + privGem->ref_count++; + } + else if (ret == 1) + { + privGem = calloc (1, sizeof(PrivGem)); + privGem->ref_count = 1; + if (drmHashInsert (bufmgr_exynos4412->hashBos, bo_exynos4412->name, (void *)privGem) < 0) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot insert bo to Hash(%d)\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->name); + } + } + else + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot insert bo to Hash(%d)\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->name); + } + + DBG ("[libtbm-exynos4412:%d] %s size:%d, gem:%d(%d), flags:%d(%d)\n", getpid(), + __FUNCTION__, bo_exynos4412->size, + bo_exynos4412->gem, bo_exynos4412->name, + bo_exynos4412->flags_tbm, bo_exynos4412->flags_exynos); + + return (void *)bo_exynos4412; +} + +static unsigned int +tbm_exynos4412_bo_export (tbm_bo bo) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, 0); + + tbm_bo_exynos4412 bo_exynos4412; + + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bo_exynos4412!=NULL, 0); + + if (!bo_exynos4412->name) + { + bo_exynos4412->name = _get_name(bo_exynos4412->fd, bo_exynos4412->gem); + if (!bo_exynos4412->name) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot get name\n", + getpid(), __FUNCTION__, __LINE__); + return 0; + } + } + + DBG ("[libtbm-exynos4412:%d] %s size:%d, gem:%d(%d), flags:%d(%d)\n", getpid(), + __FUNCTION__, bo_exynos4412->size, + bo_exynos4412->gem, bo_exynos4412->name, + bo_exynos4412->flags_tbm, bo_exynos4412->flags_exynos); + + return (unsigned int)bo_exynos4412->name; +} + +static tbm_bo_handle +tbm_exynos4412_bo_get_handle (tbm_bo bo, int device) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, (tbm_bo_handle) NULL); + + tbm_bo_handle bo_handle; + tbm_bo_exynos4412 bo_exynos4412; + + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bo_exynos4412!=NULL, (tbm_bo_handle) NULL); + + if (!bo_exynos4412->gem) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot map gem=%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); + return (tbm_bo_handle) NULL; + } + + DBG ("[libtbm-exynos4412:%d] %s gem:%d(%d), %s\n", getpid(), + __FUNCTION__, bo_exynos4412->gem, bo_exynos4412->name, STR_DEVICE[device]); + + /*Get mapped bo_handle*/ + bo_handle = _exynos4412_bo_handle (bo_exynos4412, device); + if (bo_handle.ptr == NULL) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot get handle: gem:%d, device:%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem, device); + return (tbm_bo_handle) NULL; + } + + return bo_handle; +} + +static tbm_bo_handle +tbm_exynos4412_bo_map (tbm_bo bo, int device, int opt) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, (tbm_bo_handle) NULL); + + tbm_bo_handle bo_handle; + tbm_bo_exynos4412 bo_exynos4412; + + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bo_exynos4412!=NULL, (tbm_bo_handle) NULL); + + if (!bo_exynos4412->gem) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot map gem=%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); + return (tbm_bo_handle) NULL; + } + + DBG ("[libtbm-exynos4412:%d] %s gem:%d(%d), %s, %s\n", getpid(), + __FUNCTION__, bo_exynos4412->gem, bo_exynos4412->name, STR_DEVICE[device], STR_OPT[opt]); + + /*Get mapped bo_handle*/ + bo_handle = _exynos4412_bo_handle (bo_exynos4412, device); + if (bo_handle.ptr == NULL) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot get handle: gem:%d, device:%d, opt:%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem, device, opt); + return (tbm_bo_handle) NULL; + } + + return bo_handle; +} + +static int +tbm_exynos4412_bo_unmap (tbm_bo bo) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, 0); + + tbm_bo_exynos4412 bo_exynos4412; + + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bo_exynos4412!=NULL, 0); + + if (!bo_exynos4412->gem) + return 0; + + DBG ("[libtbm-exynos4412:%d] %s gem:%d(%d) \n", getpid(), + __FUNCTION__, bo_exynos4412->gem, bo_exynos4412->name); + + return 1; +} + +static int +tbm_exynos4412_bo_cache_flush (tbm_bo bo, int flags) +{ + tbm_bufmgr_exynos4412 bufmgr_exynos4412 = (tbm_bufmgr_exynos4412)tbm_backend_get_bufmgr_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bufmgr_exynos4412!=NULL, 0); + + /* cache flush is managed by kernel side when using dma-fence. */ + if (bufmgr_exynos4412->use_dma_fence) + return 1; + + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, 0); + + tbm_bo_exynos4412 bo_exynos4412; + + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bo_exynos4412!=NULL, 0); + + if (!_exynos4412_cache_flush(bo_exynos4412->fd, bo_exynos4412, flags)) + return 0; + + return 1; +} + +static int +tbm_exynos4412_bo_get_global_key (tbm_bo bo) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, 0); + + tbm_bo_exynos4412 bo_exynos4412; + + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bo_exynos4412!=NULL, 0); + + if (!bo_exynos4412->name) + { + if (!bo_exynos4412->gem) + return 0; + + bo_exynos4412->name = _get_name(bo_exynos4412->fd, bo_exynos4412->gem); + } + + return bo_exynos4412->name; +} + +static int +tbm_exynos4412_bo_lock(tbm_bo bo, int device, int opt) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, 0); + + tbm_bufmgr_exynos4412 bufmgr_exynos4412; + tbm_bo_exynos4412 bo_exynos4412; + struct dma_buf_fence fence; + struct flock filelock; + int ret=0; + + if (device != TBM_DEVICE_3D && device != TBM_DEVICE_CPU) + { + DBG ("[libtbm-exynos4412:%d] %s not support device type,\n", getpid(), __FUNCTION__); + return 0; + } + + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bo_exynos4412!=NULL, 0); + + bufmgr_exynos4412 = (tbm_bufmgr_exynos4412)tbm_backend_get_bufmgr_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bufmgr_exynos4412!=NULL, 0); + + memset(&fence, 0, sizeof(struct dma_buf_fence)); + + /* Check if the given type is valid or not. */ + if (opt & TBM_OPTION_WRITE) + { + if (device == TBM_DEVICE_3D) + fence.type = DMA_BUF_ACCESS_WRITE | DMA_BUF_ACCESS_DMA; + } + else if (opt & TBM_OPTION_READ) + { + if (device == TBM_DEVICE_3D) + fence.type = DMA_BUF_ACCESS_READ | DMA_BUF_ACCESS_DMA; + } + else + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] error %s:%d Invalid argument\n", getpid(), __FUNCTION__, __LINE__); + return 0; + } + + /* Check if the tbm manager supports dma fence or not. */ + if (!bufmgr_exynos4412->use_dma_fence) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Not support DMA FENCE(%s)\n", + getpid(), __FUNCTION__, __LINE__, strerror(errno) ); + return 0; + + } + + if (device == TBM_DEVICE_3D) + { + ret = ioctl(bo_exynos4412->dmabuf, DMABUF_IOCTL_GET_FENCE, &fence); + if (ret < 0) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Can not set GET FENCE(%s)\n", + getpid(), __FUNCTION__, __LINE__, strerror(errno) ); + return 0; + } + } else + { + if (opt & TBM_OPTION_WRITE) + filelock.l_type = F_WRLCK; + else + filelock.l_type = F_RDLCK; + + filelock.l_whence = SEEK_CUR; + filelock.l_start = 0; + filelock.l_len = 0; + + if (-1 == fcntl(bo_exynos4412->dmabuf, F_SETLKW, &filelock)) + { + return 0; + } + } + + pthread_mutex_lock(&bo_exynos4412->mutex); + + if (device == TBM_DEVICE_3D) + { + int i; + for (i = 0; i < DMA_FENCE_LIST_MAX; i++) + { + if (bo_exynos4412->dma_fence[i].ctx == 0) + { + bo_exynos4412->dma_fence[i].type = fence.type; + bo_exynos4412->dma_fence[i].ctx = fence.ctx; + break; + } + } + + if (i == DMA_FENCE_LIST_MAX) + { + //TODO: if dma_fence list is full, it needs realloc. I will fix this. by minseok3.kim + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d fence list is full\n", + getpid(), __FUNCTION__, __LINE__); + } + } + + pthread_mutex_unlock(&bo_exynos4412->mutex); + + DBG ("[libtbm-exynos4412:%d] %s DMABUF_IOCTL_GET_FENCE! flink_id=%d dmabuf=%d\n", getpid(), + __FUNCTION__, bo_exynos4412->name, bo_exynos4412->dmabuf); + + return 1; +} + +static int +tbm_exynos4412_bo_unlock(tbm_bo bo) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, 0); + + tbm_bo_exynos4412 bo_exynos4412; + struct dma_buf_fence fence; + struct flock filelock; + unsigned int dma_type = 0; + int ret=0; + + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bo_exynos4412!=NULL, 0); + + if (bo_exynos4412->dma_fence[0].type & DMA_BUF_ACCESS_DMA) + dma_type = 1; + + if (!bo_exynos4412->dma_fence[0].ctx && dma_type) + { + DBG ("[libtbm-exynos4412:%d] %s FENCE not support or ignored,\n", getpid(), __FUNCTION__); + return 0; + } + + if (!bo_exynos4412->dma_fence[0].ctx && dma_type) + { + DBG ("[libtbm-exynos4412:%d] %s device type is not 3D/CPU,\n", getpid(), __FUNCTION__); + return 0; + } + + pthread_mutex_lock(&bo_exynos4412->mutex); + + if (dma_type) + { + fence.type = bo_exynos4412->dma_fence[0].type; + fence.ctx = bo_exynos4412->dma_fence[0].ctx; + int i; + for (i = 1; i < DMA_FENCE_LIST_MAX; i++) + { + bo_exynos4412->dma_fence[i-1].type = bo_exynos4412->dma_fence[i].type; + bo_exynos4412->dma_fence[i-1].ctx = bo_exynos4412->dma_fence[i].ctx; + } + bo_exynos4412->dma_fence[DMA_FENCE_LIST_MAX-1].type = 0; + bo_exynos4412->dma_fence[DMA_FENCE_LIST_MAX-1].ctx = 0; + } + pthread_mutex_unlock(&bo_exynos4412->mutex); + + if (dma_type) + { + ret = ioctl(bo_exynos4412->dmabuf, DMABUF_IOCTL_PUT_FENCE, &fence); + if (ret < 0) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Can not set PUT FENCE(%s)\n", + getpid(), __FUNCTION__, __LINE__, strerror(errno) ); + return 0; + } + } else + { + filelock.l_type = F_UNLCK; + filelock.l_whence = SEEK_CUR; + filelock.l_start = 0; + filelock.l_len = 0; + + if (-1 == fcntl(bo_exynos4412->dmabuf, F_SETLKW, &filelock)) + { + return 0; + } + } + + DBG ("[libtbm-exynos4412:%d] %s DMABUF_IOCTL_PUT_FENCE! flink_id=%d dmabuf=%d\n", getpid(), + __FUNCTION__, bo_exynos4412->name, bo_exynos4412->dmabuf); + + return 1; +} + +static void +tbm_exynos4412_bufmgr_deinit (void *priv) +{ + EXYNOS4412_RETURN_IF_FAIL (priv!=NULL); + + tbm_bufmgr_exynos4412 bufmgr_exynos4412; + + bufmgr_exynos4412 = (tbm_bufmgr_exynos4412)priv; + + if (bufmgr_exynos4412->hashBos) + { + unsigned long key; + void *value; + + while (drmHashFirst(bufmgr_exynos4412->hashBos, &key, &value) > 0) + { + free (value); + drmHashDelete (bufmgr_exynos4412->hashBos, key); + } + + drmHashDestroy (bufmgr_exynos4412->hashBos); + bufmgr_exynos4412->hashBos = NULL; + } + + free (bufmgr_exynos4412); +} + +MODULEINITPPROTO (init_tbm_bufmgr_priv); + +static TBMModuleVersionInfo Exynos4412VersRec = +{ + "exynos4412", + "Samsung", + TBM_ABI_VERSION, +}; + +TBMModuleData tbmModuleData = { &Exynos4412VersRec, init_tbm_bufmgr_priv}; + +int +init_tbm_bufmgr_priv (tbm_bufmgr bufmgr, int fd) +{ + tbm_bufmgr_exynos4412 bufmgr_exynos4412; + tbm_bufmgr_backend bufmgr_backend; + + if (!bufmgr) + return 0; + + bufmgr_exynos4412 = calloc (1, sizeof(struct _tbm_bufmgr_exynos4412)); + if (!bufmgr_exynos4412) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] error: Fail to alloc bufmgr_exynos4412!\n", getpid()); + return 0; + } + + bufmgr_exynos4412->fd = fd; + if (bufmgr_exynos4412->fd < 0) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] error: Fail to create drm!\n", getpid()); + free (bufmgr_exynos4412); + return 0; + } + + //Create Hash Table + bufmgr_exynos4412->hashBos = drmHashCreate (); + + //Check if the tbm manager supports dma fence or not. + int fp = open("/sys/module/dmabuf_sync/parameters/enabled", O_RDONLY); + int length; + char buf[1]; + if (fp != -1) + { + length = read(fp, buf, 1); + + if (length == 1 && buf[0] == '1') + bufmgr_exynos4412->use_dma_fence = 1; + + close(fp); + } + + bufmgr_backend = tbm_backend_alloc(); + if (!bufmgr_backend) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] error: Fail to create drm!\n", getpid()); + free (bufmgr_exynos4412); + return 0; + } + + bufmgr_backend->priv = (void *)bufmgr_exynos4412; + bufmgr_backend->bufmgr_deinit = tbm_exynos4412_bufmgr_deinit, + bufmgr_backend->bo_size = tbm_exynos4412_bo_size, + bufmgr_backend->bo_alloc = tbm_exynos4412_bo_alloc, + bufmgr_backend->bo_free = tbm_exynos4412_bo_free, + bufmgr_backend->bo_import = tbm_exynos4412_bo_import, + bufmgr_backend->bo_export = tbm_exynos4412_bo_export, + bufmgr_backend->bo_get_handle = tbm_exynos4412_bo_get_handle, + bufmgr_backend->bo_map = tbm_exynos4412_bo_map, + bufmgr_backend->bo_unmap = tbm_exynos4412_bo_unmap, + bufmgr_backend->bo_cache_flush = tbm_exynos4412_bo_cache_flush, + bufmgr_backend->bo_get_global_key = tbm_exynos4412_bo_get_global_key; + + if (bufmgr_exynos4412->use_dma_fence) + { + bufmgr_backend->flags = (TBM_LOCK_CTRL_BACKEND | TBM_CACHE_CTRL_BACKEND); + bufmgr_backend->bo_lock = NULL; + bufmgr_backend->bo_lock2 = tbm_exynos4412_bo_lock; + bufmgr_backend->bo_unlock = tbm_exynos4412_bo_unlock; + } + else + { + bufmgr_backend->flags = 0; + bufmgr_backend->bo_lock = NULL; + bufmgr_backend->bo_unlock = NULL; + } + + if (!tbm_backend_init (bufmgr, bufmgr_backend)) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] error: Fail to init backend!\n", getpid()); + tbm_backend_free (bufmgr_backend); + free (bufmgr_exynos4412); + return 0; + } + +#ifdef DEBUG + { + char* env; + env = getenv ("TBM_EXYNOS4412_DEBUG"); + if (env) + { + bDebug = atoi (env); + TBM_EXYNOS4412_LOG ("TBM_EXYNOS4412_DEBUG=%s\n", env); + } + else + { + bDebug = 0; + } + } +#endif + + DBG ("[libtbm-exynos4412:%d] %s DMABUF FENCE is %s\n", getpid(), + __FUNCTION__, bufmgr_exynos4412->use_dma_fence ? "supported!" : "NOT supported!"); + + DBG ("[libtbm-exynos4412:%d] %s fd:%d\n", getpid(), + __FUNCTION__, bufmgr_exynos4412->fd); + + return 1; +} + + -- 2.7.4 From da6965319ca5b0b6718c467808b1120b693a8c58 Mon Sep 17 00:00:00 2001 From: SooChan Lim Date: Mon, 18 Aug 2014 10:47:11 +0900 Subject: [PATCH 03/10] version up Change-Id: I0ade6bddf13d74766692b84b66903543be94d63f --- configure.ac | 2 +- packaging/libtbm-exynos4412.spec | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configure.ac b/configure.ac index a0d26ed..112e12a 100644 --- a/configure.ac +++ b/configure.ac @@ -18,7 +18,7 @@ # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. AC_PREREQ(2.60) -AC_INIT(libtbm-exynos4412, 1.0.0) +AC_INIT(libtbm-exynos4412, 1.0.5) AC_USE_SYSTEM_EXTENSIONS AC_CONFIG_SRCDIR([Makefile.am]) AM_INIT_AUTOMAKE([dist-bzip2]) diff --git a/packaging/libtbm-exynos4412.spec b/packaging/libtbm-exynos4412.spec index 1ef54df..539741c 100644 --- a/packaging/libtbm-exynos4412.spec +++ b/packaging/libtbm-exynos4412.spec @@ -2,7 +2,7 @@ Name: libtbm-exynos4412 Version: 1.0.5 Release: 1 License: MIT -Summary: The exynos4412 tbm backend +Summary: Tizen Buffer Manager - exynos4412 backend Group: System/Libraries ExcludeArch: i586 Source0: %{name}-%{version}.tar.gz -- 2.7.4 From d9ea3f467aedc561c347734df15014add694c49a Mon Sep 17 00:00:00 2001 From: SooChan Lim Date: Mon, 25 Aug 2014 15:19:21 +0900 Subject: [PATCH 04/10] add the code for supporting the tbm_surface Change-Id: I6b3280a882cf07ec4b2c2c3ba1bb275ff7027474 --- configure.ac | 5 +- packaging/libtbm-exynos4412.spec | 1 + src/tbm_bufmgr_exynos4412.c | 515 ++++++++++++++++++++++++++++++++++++++- 3 files changed, 515 insertions(+), 6 deletions(-) diff --git a/configure.ac b/configure.ac index 112e12a..37bf4f4 100644 --- a/configure.ac +++ b/configure.ac @@ -39,6 +39,7 @@ m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])]) PKG_CHECK_MODULES(LIBDRM, libdrm) PKG_CHECK_MODULES(LIBDRM_EXYNOS, libdrm_exynos) PKG_CHECK_MODULES(LIBTBM, libtbm) +PKG_CHECK_MODULES(DLOG, dlog) AC_ARG_ENABLE(cachectrl, AS_HELP_STRING([--enable-cache-crtl], @@ -49,8 +50,8 @@ if test "x$CACHE_CTRL" = xyes; then AC_DEFINE(ENABLE_CACHECRTL, 1, [Enable cache control]) fi -LIBTBM_EXYNOS4412_CFLAGS="$LIBDRM_CFLAGS $LIBDRM_EXYNOS_CFLAGS $LIBTBM_CFLAGS " -LIBTBM_EXYNOS4412_LIBS="$LIBDRM_LIBS $LIBDRM_EXYNOS_LIBS $LIBTBM_LIBS " +LIBTBM_EXYNOS4412_CFLAGS="$LIBDRM_CFLAGS $LIBDRM_EXYNOS_CFLAGS $LIBTBM_CFLAGS $DLOG_CFLAGS " +LIBTBM_EXYNOS4412_LIBS="$LIBDRM_LIBS $LIBDRM_EXYNOS_LIBS $LIBTBM_LIBS $DLOG_LIBS " AC_SUBST(LIBTBM_EXYNOS4412_CFLAGS) AC_SUBST(LIBTBM_EXYNOS4412_LIBS) diff --git a/packaging/libtbm-exynos4412.spec b/packaging/libtbm-exynos4412.spec index 539741c..5e7b391 100644 --- a/packaging/libtbm-exynos4412.spec +++ b/packaging/libtbm-exynos4412.spec @@ -11,6 +11,7 @@ BuildRequires: pkgconfig(pthread-stubs) BuildRequires: pkgconfig(libdrm) BuildRequires: pkgconfig(libdrm_exynos) BuildRequires: pkgconfig(libtbm) +BuildRequires: pkgconfig(dlog) %description descriptionion: Tizen Buffer manager backend module for exynos4412 diff --git a/src/tbm_bufmgr_exynos4412.c b/src/tbm_bufmgr_exynos4412.c index 259edee..9f47379 100755 --- a/src/tbm_bufmgr_exynos4412.c +++ b/src/tbm_bufmgr_exynos4412.c @@ -46,20 +46,71 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include #include #include -#include "exynos_drm.h" +#include #include +#include +#include #define DEBUG #define USE_DMAIMPORT -#define TBM_EXYNOS4412_LOG(...) fprintf (stderr, __VA_ARGS__) +#define TBM_COLOR_FORMAT_COUNT 8 #ifdef DEBUG -static int bDebug = 0; -#define DBG(...) if(bDebug&0x1) TBM_EXYNOS4412_LOG (__VA_ARGS__) +#define LOG_TAG "TBM_BACKEND" +#include +static int bDebug=0; + +char* target_name() +{ + FILE *f; + char *slash; + static int initialized = 0; + static char app_name[128]; + + if ( initialized ) + return app_name; + + /* get the application name */ + f = fopen("/proc/self/cmdline", "r"); + + if ( !f ) + { + return 0; + } + + memset(app_name, 0x00, sizeof(app_name)); + + if ( fgets(app_name, 100, f) == NULL ) + { + fclose(f); + return 0; + } + + fclose(f); + + if ( (slash=strrchr(app_name, '/')) != NULL ) + { + memmove(app_name, slash+1, strlen(slash)); + } + + initialized = 1; + + return app_name; +} +#define TBM_EXYNOS4412_LOG(fmt, args...) LOGE("\033[31m" "[%s]" fmt "\033[0m", target_name(), ##args) +#define DBG(fmt, args...) if(bDebug&01) LOGE("[%s]" fmt, target_name(), ##args) #else +#define TBM_EXYNOS4412_LOG(...) #define DBG(...) #endif +#define SIZE_ALIGN( value, base ) (((value) + ((base) - 1)) & ~((base) - 1)) + +#define TBM_SURFACE_ALIGNMENT_PLANE (64) +#define TBM_SURFACE_ALIGNMENT_PITCH_RGB (64) +#define TBM_SURFACE_ALIGNMENT_PITCH_YUV (16) + + /* check condition */ #define EXYNOS4412_RETURN_IF_FAIL(cond) {\ if (!(cond)) {\ @@ -160,6 +211,17 @@ char *STR_OPT[]= "RDWR" }; + +uint32_t tbm_exynos4412_color_format_list[TBM_COLOR_FORMAT_COUNT] = { TBM_FORMAT_RGBA8888, + TBM_FORMAT_BGRA8888, + TBM_FORMAT_RGBX8888, + TBM_FORMAT_RGB888, + TBM_FORMAT_NV12, + TBM_FORMAT_NV21, + TBM_FORMAT_YUV420, + TBM_FORMAT_YVU420 }; + + static unsigned int _get_exynos_flag_from_tbm (unsigned int ftbm) { @@ -1006,6 +1068,448 @@ tbm_exynos4412_bufmgr_deinit (void *priv) free (bufmgr_exynos4412); } +int +tbm_exynos4412_surface_supported_format(uint32_t **formats, uint32_t *num) +{ + uint32_t* color_formats=NULL; + + color_formats = (uint32_t*)calloc (1,sizeof(uint32_t)*TBM_COLOR_FORMAT_COUNT); + + if( color_formats == NULL ) + { + return 0; + } + memcpy( color_formats, tbm_exynos4412_color_format_list , sizeof(uint32_t)*TBM_COLOR_FORMAT_COUNT ); + + + *formats = color_formats; + *num = TBM_COLOR_FORMAT_COUNT; + + fprintf (stderr, "tbm_exynos4412_surface_supported_format count = %d \n",*num); + + return 1; +} + + +/** + * @brief get the plane data of the surface. + * @param[in] surface : the surface + * @param[in] width : the width of the surface + * @param[in] height : the height of the surface + * @param[in] format : the format of the surface + * @param[in] plane_idx : the format of the surface + * @param[out] size : the size of the plane + * @param[out] offset : the offset of the plane + * @param[out] pitch : the pitch of the plane + * @param[out] padding : the padding of the plane + * @return 1 if this function succeeds, otherwise 0. + */ +int +tbm_exynos4412_surface_get_plane_data(tbm_surface_h surface, int width, int height, tbm_format format, int plane_idx, uint32_t *size, uint32_t *offset, uint32_t *pitch) +{ + int ret = 1; + int bpp; + int _offset =0; + int _pitch =0; + int _size =0; + + + switch(format) + { + /* 16 bpp RGB */ + case TBM_FORMAT_XRGB4444: + case TBM_FORMAT_XBGR4444: + case TBM_FORMAT_RGBX4444: + case TBM_FORMAT_BGRX4444: + case TBM_FORMAT_ARGB4444: + case TBM_FORMAT_ABGR4444: + case TBM_FORMAT_RGBA4444: + case TBM_FORMAT_BGRA4444: + case TBM_FORMAT_XRGB1555: + case TBM_FORMAT_XBGR1555: + case TBM_FORMAT_RGBX5551: + case TBM_FORMAT_BGRX5551: + case TBM_FORMAT_ARGB1555: + case TBM_FORMAT_ABGR1555: + case TBM_FORMAT_RGBA5551: + case TBM_FORMAT_BGRA5551: + case TBM_FORMAT_RGB565: + bpp = 16; + _offset = 0; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* 24 bpp RGB */ + case TBM_FORMAT_RGB888: + case TBM_FORMAT_BGR888: + bpp = 24; + _offset = 0; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* 32 bpp RGB */ + case TBM_FORMAT_XRGB8888: + case TBM_FORMAT_XBGR8888: + case TBM_FORMAT_RGBX8888: + case TBM_FORMAT_BGRX8888: + case TBM_FORMAT_ARGB8888: + case TBM_FORMAT_ABGR8888: + case TBM_FORMAT_RGBA8888: + case TBM_FORMAT_BGRA8888: + bpp = 32; + _offset = 0; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + + /* packed YCbCr */ + case TBM_FORMAT_YUYV: + case TBM_FORMAT_YVYU: + case TBM_FORMAT_UYVY: + case TBM_FORMAT_VYUY: + case TBM_FORMAT_AYUV: + bpp = 32; + _offset = 0; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + + /* + * 2 plane YCbCr + * index 0 = Y plane, [7:0] Y + * index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian + * or + * index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian + */ + case TBM_FORMAT_NV12: + case TBM_FORMAT_NV21: + bpp = 12; + if(plane_idx == 0) + { + _offset = 0; + _pitch = SIZE_ALIGN( width ,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + else if( plane_idx ==1 ) + { + _offset = width*height; + _pitch = SIZE_ALIGN( width ,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + + case TBM_FORMAT_NV16: + case TBM_FORMAT_NV61: + bpp = 16; + //if(plane_idx == 0) + { + _offset = 0; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 0) + break; + } + //else if( plane_idx ==1 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + + /* + * 3 plane YCbCr + * index 0: Y plane, [7:0] Y + * index 1: Cb plane, [7:0] Cb + * index 2: Cr plane, [7:0] Cr + * or + * index 1: Cr plane, [7:0] Cr + * index 2: Cb plane, [7:0] Cb + */ + /* + NATIVE_BUFFER_FORMAT_YV12 + NATIVE_BUFFER_FORMAT_I420 + */ + case TBM_FORMAT_YUV410: + case TBM_FORMAT_YVU410: + bpp = 9; + break; + case TBM_FORMAT_YUV411: + case TBM_FORMAT_YVU411: + case TBM_FORMAT_YUV420: + case TBM_FORMAT_YVU420: + bpp = 12; + //if(plane_idx == 0) + { + _offset = 0; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 0) + break; + } + //else if( plane_idx == 1 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 1) + break; + } + //else if (plane_idx == 2 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + case TBM_FORMAT_YUV422: + case TBM_FORMAT_YVU422: + bpp = 16; + //if(plane_idx == 0) + { + _offset = 0; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 0) + break; + } + //else if( plane_idx == 1 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*(height),TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 1) + break; + } + //else if (plane_idx == 2 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size = SIZE_ALIGN(_pitch*(height),TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + case TBM_FORMAT_YUV444: + case TBM_FORMAT_YVU444: + bpp = 24; + //if(plane_idx == 0) + { + _offset = 0; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 0) + break; + } + //else if( plane_idx == 1 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + if(plane_idx == 1) + break; + } + //else if (plane_idx == 2 ) + { + _offset += _size; + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + default: + bpp = 0; + break; + } + + *size = _size; + *offset = _offset; + *pitch = _pitch; + + return ret; +} +/** +* @brief get the size of the surface with a format. +* @param[in] surface : the surface +* @param[in] width : the width of the surface +* @param[in] height : the height of the surface +* @param[in] format : the format of the surface +* @return size of the surface if this function succeeds, otherwise 0. +*/ + +int +tbm_exynos4412_surface_get_size(tbm_surface_h surface, int width, int height, tbm_format format) +{ + int ret = 0; + int bpp = 0; + int _pitch =0; + int _size =0; + int align =TBM_SURFACE_ALIGNMENT_PLANE; + + switch(format) + { + /* 16 bpp RGB */ + case TBM_FORMAT_XRGB4444: + case TBM_FORMAT_XBGR4444: + case TBM_FORMAT_RGBX4444: + case TBM_FORMAT_BGRX4444: + case TBM_FORMAT_ARGB4444: + case TBM_FORMAT_ABGR4444: + case TBM_FORMAT_RGBA4444: + case TBM_FORMAT_BGRA4444: + case TBM_FORMAT_XRGB1555: + case TBM_FORMAT_XBGR1555: + case TBM_FORMAT_RGBX5551: + case TBM_FORMAT_BGRX5551: + case TBM_FORMAT_ARGB1555: + case TBM_FORMAT_ABGR1555: + case TBM_FORMAT_RGBA5551: + case TBM_FORMAT_BGRA5551: + case TBM_FORMAT_RGB565: + bpp = 16; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* 24 bpp RGB */ + case TBM_FORMAT_RGB888: + case TBM_FORMAT_BGR888: + bpp = 24; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* 32 bpp RGB */ + case TBM_FORMAT_XRGB8888: + case TBM_FORMAT_XBGR8888: + case TBM_FORMAT_RGBX8888: + case TBM_FORMAT_BGRX8888: + case TBM_FORMAT_ARGB8888: + case TBM_FORMAT_ABGR8888: + case TBM_FORMAT_RGBA8888: + case TBM_FORMAT_BGRA8888: + bpp = 32; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_RGB); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* packed YCbCr */ + case TBM_FORMAT_YUYV: + case TBM_FORMAT_YVYU: + case TBM_FORMAT_UYVY: + case TBM_FORMAT_VYUY: + case TBM_FORMAT_AYUV: + bpp = 32; + _pitch = SIZE_ALIGN((width*bpp)>>3,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + break; + /* + * 2 plane YCbCr + * index 0 = Y plane, [7:0] Y + * index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian + * or + * index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian + */ + case TBM_FORMAT_NV12: + case TBM_FORMAT_NV21: + bpp = 12; + //plane_idx == 0 + { + _pitch = SIZE_ALIGN( width ,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx ==1 + { + _pitch = SIZE_ALIGN( width ,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + + break; + case TBM_FORMAT_NV16: + case TBM_FORMAT_NV61: + bpp = 16; + //plane_idx == 0 + { + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx ==1 + { + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + + break; + /* + * 3 plane YCbCr + * index 0: Y plane, [7:0] Y + * index 1: Cb plane, [7:0] Cb + * index 2: Cr plane, [7:0] Cr + * or + * index 1: Cr plane, [7:0] Cr + * index 2: Cb plane, [7:0] Cb + */ + case TBM_FORMAT_YUV410: + case TBM_FORMAT_YVU410: + bpp = 9; + align = TBM_SURFACE_ALIGNMENT_PITCH_YUV; + break; + case TBM_FORMAT_YUV411: + case TBM_FORMAT_YVU411: + case TBM_FORMAT_YUV420: + case TBM_FORMAT_YVU420: + bpp = 12; + //plane_idx == 0 + { + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx == 1 + { + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx == 2 + { + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*(height/2),TBM_SURFACE_ALIGNMENT_PLANE); + } + + break; + case TBM_FORMAT_YUV422: + case TBM_FORMAT_YVU422: + bpp = 16; + //plane_idx == 0 + { + _pitch = SIZE_ALIGN(width,TBM_SURFACE_ALIGNMENT_PITCH_YUV); + _size = SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx == 1 + { + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + //plane_idx == 2 + { + _pitch = SIZE_ALIGN(width/2,TBM_SURFACE_ALIGNMENT_PITCH_YUV/2); + _size += SIZE_ALIGN(_pitch*height,TBM_SURFACE_ALIGNMENT_PLANE); + } + break; + case TBM_FORMAT_YUV444: + case TBM_FORMAT_YVU444: + bpp = 24; + align = TBM_SURFACE_ALIGNMENT_PITCH_YUV; + break; + + default: + bpp = 0; + break; + } + + if(_size > 0) + ret = _size; + else + ret = SIZE_ALIGN( (width * height * bpp) >> 3, align); + + return ret; + +} + MODULEINITPPROTO (init_tbm_bufmgr_priv); static TBMModuleVersionInfo Exynos4412VersRec = @@ -1078,6 +1582,9 @@ init_tbm_bufmgr_priv (tbm_bufmgr bufmgr, int fd) bufmgr_backend->bo_unmap = tbm_exynos4412_bo_unmap, bufmgr_backend->bo_cache_flush = tbm_exynos4412_bo_cache_flush, bufmgr_backend->bo_get_global_key = tbm_exynos4412_bo_get_global_key; + bufmgr_backend->surface_get_plane_data = tbm_exynos4412_surface_get_plane_data; + bufmgr_backend->surface_get_size = tbm_exynos4412_surface_get_size; + bufmgr_backend->surface_supported_format = tbm_exynos4412_surface_supported_format; if (bufmgr_exynos4412->use_dma_fence) { -- 2.7.4 From 9fdb8057c523af9a97cf7ed711c8de7ca9f45ca0 Mon Sep 17 00:00:00 2001 From: Roman Marchenko Date: Fri, 26 Sep 2014 16:38:58 +0300 Subject: [PATCH 05/10] add the code for supporting the tbm_fd Change-Id: I4b1db124e57228f6ea1f8696b17ca7e03fb37209 Signed-off-by: Roman Marchenko --- src/tbm_bufmgr_exynos4412.c | 151 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 149 insertions(+), 2 deletions(-) mode change 100755 => 100644 src/tbm_bufmgr_exynos4412.c diff --git a/src/tbm_bufmgr_exynos4412.c b/src/tbm_bufmgr_exynos4412.c old mode 100755 new mode 100644 index 9f47379..24214c2 --- a/src/tbm_bufmgr_exynos4412.c +++ b/src/tbm_bufmgr_exynos4412.c @@ -684,9 +684,121 @@ tbm_exynos4412_bo_import (tbm_bo bo, unsigned int key) getpid(), __FUNCTION__, __LINE__, bo_exynos4412->name); } - DBG ("[libtbm-exynos4412:%d] %s size:%d, gem:%d(%d), flags:%d(%d)\n", getpid(), + DBG ("[libtbm-exynos4412:%d] %s size:%d, gem:%d(%d, %d), flags:%d(%d)\n", getpid(), __FUNCTION__, bo_exynos4412->size, - bo_exynos4412->gem, bo_exynos4412->name, + bo_exynos4412->gem, bo_exynos4412->name, bo_exynos4412->dmabuf, + bo_exynos4412->flags_tbm, bo_exynos4412->flags_exynos); + + return (void *)bo_exynos4412; +} + +static void * +tbm_exynos4412_bo_import_fd (tbm_bo bo, tbm_fd key) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, 0); + + tbm_bufmgr_exynos4412 bufmgr_exynos4412; + tbm_bo_exynos4412 bo_exynos4412; + + bufmgr_exynos4412 = (tbm_bufmgr_exynos4412)tbm_backend_get_bufmgr_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bufmgr_exynos4412!=NULL, 0); + + unsigned int gem = 0; + unsigned int real_size = -1; + struct drm_exynos_gem_info info = {0, }; + + //getting handle from fd + struct drm_prime_handle arg = {0, }; + + arg.fd = key; + arg.flags = 0; + if (drmIoctl (bufmgr_exynos4412->fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &arg)) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot getting gem from prime fd=%d\n", + getpid(), __FUNCTION__, __LINE__, arg.fd); + return NULL; + } + gem = arg.handle; + + /* Determine size of bo. The fd-to-handle ioctl really should + * return the size, but it doesn't. If we have kernel 3.12 or + * later, we can lseek on the prime fd to get the size. Older + * kernels will just fail, in which case we fall back to the + * provided (estimated or guess size). */ + real_size = lseek(key, 0, SEEK_END); + + info.handle = gem; + if (drmCommandWriteRead(bufmgr_exynos4412->fd, + DRM_EXYNOS_GEM_GET, + &info, + sizeof(struct drm_exynos_gem_info))) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot get gem info=%d\n", + getpid(), __FUNCTION__, __LINE__, key); + return 0; + } + + if (real_size == -1) + real_size = info.size; + + bo_exynos4412 = calloc (1, sizeof(struct _tbm_bo_exynos4412)); + if (!bo_exynos4412) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d fail to allocate the bo private\n", + getpid(), __FUNCTION__, __LINE__); + return 0; + } + + bo_exynos4412->fd = bufmgr_exynos4412->fd; + bo_exynos4412->gem = gem; + bo_exynos4412->size = real_size; + bo_exynos4412->flags_exynos = info.flags; + bo_exynos4412->flags_tbm = _get_tbm_flag_from_exynos (bo_exynos4412->flags_exynos); + + bo_exynos4412->name = _get_name(bo_exynos4412->fd, bo_exynos4412->gem); + if (!bo_exynos4412->name) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot get name\n", + getpid(), __FUNCTION__, __LINE__); + return 0; + } + + bo_exynos4412->dmabuf = (unsigned int)key; + + /* add bo to hash */ + PrivGem *privGem = NULL; + int ret; + + ret = drmHashLookup (bufmgr_exynos4412->hashBos, bo_exynos4412->name, (void**)&privGem); + if (ret == 0) + { + privGem->ref_count++; + } + else if (ret == 1) + { + privGem = calloc (1, sizeof(PrivGem)); + privGem->ref_count = 1; + if (drmHashInsert (bufmgr_exynos4412->hashBos, bo_exynos4412->name, (void *)privGem) < 0) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot insert bo to Hash(%d)\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->name); + } + } + else + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot insert bo to Hash(%d)\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->name); + } + + DBG ("[libtbm-exynos4412:%d] %s size:%d, gem:%d(%d,%d), flags:%d(%d)\n", getpid(), + __FUNCTION__, bo_exynos4412->size, + bo_exynos4412->gem, bo_exynos4412->name, bo_exynos4412->dmabuf, bo_exynos4412->flags_tbm, bo_exynos4412->flags_exynos); return (void *)bo_exynos4412; @@ -722,6 +834,39 @@ tbm_exynos4412_bo_export (tbm_bo bo) return (unsigned int)bo_exynos4412->name; } +tbm_fd +tbm_exynos4412_bo_export_fd (tbm_bo bo) +{ + EXYNOS4412_RETURN_VAL_IF_FAIL (bo!=NULL, 0); + + tbm_bo_exynos4412 bo_exynos4412; + + bo_exynos4412 = (tbm_bo_exynos4412)tbm_backend_get_bo_priv(bo); + EXYNOS4412_RETURN_VAL_IF_FAIL (bo_exynos4412!=NULL, 0); + + if (!bo_exynos4412->dmabuf) + { + struct drm_prime_handle arg = {0, }; + + arg.handle = bo_exynos4412->gem; + if (drmIoctl (bo_exynos4412->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg)) + { + TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " + "error %s:%d Cannot dmabuf=%d\n", + getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); + return (tbm_fd) NULL; + } + bo_exynos4412->dmabuf = arg.fd; + } + + DBG ("[libtbm-exynos4412:%d] %s size:%d, gem:%d(%d, %d), flags:%d(%d)\n", getpid(), + __FUNCTION__, bo_exynos4412->size, + bo_exynos4412->gem, bo_exynos4412->name, bo_exynos4412->dmabuf, + bo_exynos4412->flags_tbm, bo_exynos4412->flags_exynos); + + return (tbm_fd)bo_exynos4412->dmabuf; +} + static tbm_bo_handle tbm_exynos4412_bo_get_handle (tbm_bo bo, int device) { @@ -1576,7 +1721,9 @@ init_tbm_bufmgr_priv (tbm_bufmgr bufmgr, int fd) bufmgr_backend->bo_alloc = tbm_exynos4412_bo_alloc, bufmgr_backend->bo_free = tbm_exynos4412_bo_free, bufmgr_backend->bo_import = tbm_exynos4412_bo_import, + bufmgr_backend->bo_import_fd = tbm_exynos4412_bo_import_fd, bufmgr_backend->bo_export = tbm_exynos4412_bo_export, + bufmgr_backend->bo_export_fd = tbm_exynos4412_bo_export_fd, bufmgr_backend->bo_get_handle = tbm_exynos4412_bo_get_handle, bufmgr_backend->bo_map = tbm_exynos4412_bo_map, bufmgr_backend->bo_unmap = tbm_exynos4412_bo_unmap, -- 2.7.4 From 9503dccaab4d53a5a2fd473c3a2f918593b20bb5 Mon Sep 17 00:00:00 2001 From: SooChan Lim Date: Wed, 17 Dec 2014 14:47:49 +0900 Subject: [PATCH 06/10] fix -Werror=int-to-pointer-cast, -Werror=pointer-to-int-cast error at 64bits system Change-Id: Ib4ae382e5e34c700d13568c2080c331304881fc1 --- packaging/libtbm-exynos4412.spec | 2 +- src/tbm_bufmgr_exynos4412.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/packaging/libtbm-exynos4412.spec b/packaging/libtbm-exynos4412.spec index 5e7b391..4142fee 100644 --- a/packaging/libtbm-exynos4412.spec +++ b/packaging/libtbm-exynos4412.spec @@ -1,6 +1,6 @@ Name: libtbm-exynos4412 Version: 1.0.5 -Release: 1 +Release: 2 License: MIT Summary: Tizen Buffer Manager - exynos4412 backend Group: System/Libraries diff --git a/src/tbm_bufmgr_exynos4412.c b/src/tbm_bufmgr_exynos4412.c index 24214c2..cd6b28d 100644 --- a/src/tbm_bufmgr_exynos4412.c +++ b/src/tbm_bufmgr_exynos4412.c @@ -305,7 +305,7 @@ _exynos4412_bo_handle (tbm_bo_exynos4412 bo_exynos4412, int device) getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); return (tbm_bo_handle) NULL; } - bo_exynos4412->pBase = (void*)((uint32_t)arg.mapped); + bo_exynos4412->pBase = (void*)((uint64_t)arg.mapped); } bo_handle.ptr = (void *)bo_exynos4412->pBase; @@ -854,7 +854,7 @@ tbm_exynos4412_bo_export_fd (tbm_bo bo) TBM_EXYNOS4412_LOG ("[libtbm-exynos4412:%d] " "error %s:%d Cannot dmabuf=%d\n", getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); - return (tbm_fd) NULL; + return (tbm_fd) 0; } bo_exynos4412->dmabuf = arg.fd; } -- 2.7.4 From fc0fb5509a589d4ae1215347a0ddd1a0eac6f4c2 Mon Sep 17 00:00:00 2001 From: Changyeon Lee Date: Wed, 17 Dec 2014 19:19:20 +0900 Subject: [PATCH 07/10] Fix type cast Change-Id: I76585a1f8f6f2fb49dbe5c14facda147798788fb --- src/tbm_bufmgr_exynos4412.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/tbm_bufmgr_exynos4412.c b/src/tbm_bufmgr_exynos4412.c index cd6b28d..2ceabc2 100644 --- a/src/tbm_bufmgr_exynos4412.c +++ b/src/tbm_bufmgr_exynos4412.c @@ -305,7 +305,7 @@ _exynos4412_bo_handle (tbm_bo_exynos4412 bo_exynos4412, int device) getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); return (tbm_bo_handle) NULL; } - bo_exynos4412->pBase = (void*)((uint64_t)arg.mapped); + bo_exynos4412->pBase = (void*)((unsigned int)arg.mapped); } bo_handle.ptr = (void *)bo_exynos4412->pBase; -- 2.7.4 From cd5609fb63c9e302f339b75cf73fff7f6d210741 Mon Sep 17 00:00:00 2001 From: Changyeon Lee Date: Wed, 17 Dec 2014 20:21:04 +0900 Subject: [PATCH 08/10] Fix type casting error at 64bit system Change-Id: Ic942460148bbb758d07734df6a0f40a77d64f032 --- src/tbm_bufmgr_exynos4412.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/tbm_bufmgr_exynos4412.c b/src/tbm_bufmgr_exynos4412.c index 2ceabc2..7cf4a6e 100644 --- a/src/tbm_bufmgr_exynos4412.c +++ b/src/tbm_bufmgr_exynos4412.c @@ -305,7 +305,7 @@ _exynos4412_bo_handle (tbm_bo_exynos4412 bo_exynos4412, int device) getpid(), __FUNCTION__, __LINE__, bo_exynos4412->gem); return (tbm_bo_handle) NULL; } - bo_exynos4412->pBase = (void*)((unsigned int)arg.mapped); + bo_exynos4412->pBase = (void*)((unsigned long)arg.mapped); } bo_handle.ptr = (void *)bo_exynos4412->pBase; -- 2.7.4 From 4a9a3204ec2e4f17dca48fdcbffb1ae50bf1fd67 Mon Sep 17 00:00:00 2001 From: Changyeon Lee Date: Fri, 19 Dec 2014 16:00:05 +0900 Subject: [PATCH 09/10] Fix cache control configuration Change-Id: Id46aef7e7503a2748fd2de37f88c813f0eb81cd4 Signed-off-by: Changyeon Lee --- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index 37bf4f4..d2c8030 100644 --- a/configure.ac +++ b/configure.ac @@ -42,7 +42,7 @@ PKG_CHECK_MODULES(LIBTBM, libtbm) PKG_CHECK_MODULES(DLOG, dlog) AC_ARG_ENABLE(cachectrl, - AS_HELP_STRING([--enable-cache-crtl], + AS_HELP_STRING([--enable-cachecrtl], [Enable cache control (default: enable)]), [CACHE_CTRL=$enableval], [CACHE_CTRL=yes]) -- 2.7.4 From b611ba23ec456243b00f883e64005ecdf68dc249 Mon Sep 17 00:00:00 2001 From: Changyeon Lee Date: Wed, 7 Jan 2015 18:57:41 +0900 Subject: [PATCH 10/10] Fix cache control configure name Change-Id: Id58c9954eff46121cdb60f3f5bb6be5a3735bc66 --- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index d2c8030..37b3f99 100644 --- a/configure.ac +++ b/configure.ac @@ -42,7 +42,7 @@ PKG_CHECK_MODULES(LIBTBM, libtbm) PKG_CHECK_MODULES(DLOG, dlog) AC_ARG_ENABLE(cachectrl, - AS_HELP_STRING([--enable-cachecrtl], + AS_HELP_STRING([--enable-cachectrl], [Enable cache control (default: enable)]), [CACHE_CTRL=$enableval], [CACHE_CTRL=yes]) -- 2.7.4