From ffe8f47d7237cf5767f0424708670af64ba0702d Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Tue, 7 Mar 2023 14:57:06 +0100 Subject: [PATCH] [IR] Add operator<< overload for CmpInst::Predicate (NFC) I regularly try and fail to use this while debugging. --- llvm/include/llvm/IR/InstrTypes.h | 2 ++ llvm/lib/Analysis/ScalarEvolution.cpp | 3 +-- llvm/lib/CodeGen/MachineOperand.cpp | 2 +- llvm/lib/IR/AsmWriter.cpp | 5 ++--- llvm/lib/IR/Instructions.cpp | 5 +++++ llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp | 2 +- llvm/lib/Transforms/Scalar/ConstraintElimination.cpp | 2 +- llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp | 6 ++---- llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp | 2 +- 9 files changed, 16 insertions(+), 13 deletions(-) diff --git a/llvm/include/llvm/IR/InstrTypes.h b/llvm/include/llvm/IR/InstrTypes.h index 6c74842..f8c1df9 100644 --- a/llvm/include/llvm/IR/InstrTypes.h +++ b/llvm/include/llvm/IR/InstrTypes.h @@ -1074,6 +1074,8 @@ struct OperandTraits : public FixedNumOperandTraits { DEFINE_TRANSPARENT_OPERAND_ACCESSORS(CmpInst, Value) +raw_ostream &operator<<(raw_ostream &OS, CmpInst::Predicate Pred); + /// A lightweight accessor for an operand bundle meant to be passed /// around by value. struct OperandBundleUse { diff --git a/llvm/lib/Analysis/ScalarEvolution.cpp b/llvm/lib/Analysis/ScalarEvolution.cpp index cccf6cb..0cfd935 100644 --- a/llvm/lib/Analysis/ScalarEvolution.cpp +++ b/llvm/lib/Analysis/ScalarEvolution.cpp @@ -14582,8 +14582,7 @@ void SCEVComparePredicate::print(raw_ostream &OS, unsigned Depth) const { if (Pred == ICmpInst::ICMP_EQ) OS.indent(Depth) << "Equal predicate: " << *LHS << " == " << *RHS << "\n"; else - OS.indent(Depth) << "Compare predicate: " << *LHS - << " " << CmpInst::getPredicateName(Pred) << ") " + OS.indent(Depth) << "Compare predicate: " << *LHS << " " << Pred << ") " << *RHS << "\n"; } diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index 1178a93..5a43f69 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -991,7 +991,7 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, case MachineOperand::MO_Predicate: { auto Pred = static_cast(getPredicate()); OS << (CmpInst::isIntPredicate(Pred) ? "int" : "float") << "pred(" - << CmpInst::getPredicateName(Pred) << ')'; + << Pred << ')'; break; } case MachineOperand::MO_ShuffleMask: diff --git a/llvm/lib/IR/AsmWriter.cpp b/llvm/lib/IR/AsmWriter.cpp index d8e3d25..d6e3692 100644 --- a/llvm/lib/IR/AsmWriter.cpp +++ b/llvm/lib/IR/AsmWriter.cpp @@ -1589,8 +1589,7 @@ static void WriteConstantInternal(raw_ostream &Out, const Constant *CV, Out << CE->getOpcodeName(); WriteOptimizationInfo(Out, CE); if (CE->isCompare()) - Out << ' ' << CmpInst::getPredicateName( - static_cast(CE->getPredicate())); + Out << ' ' << static_cast(CE->getPredicate()); Out << " ("; std::optional InRangeOp; @@ -4086,7 +4085,7 @@ void AssemblyWriter::printInstruction(const Instruction &I) { // Print out the compare instruction predicates if (const CmpInst *CI = dyn_cast(&I)) - Out << ' ' << CmpInst::getPredicateName(CI->getPredicate()); + Out << ' ' << CI->getPredicate(); // Print out the atomicrmw operation if (const AtomicRMWInst *RMWI = dyn_cast(&I)) diff --git a/llvm/lib/IR/Instructions.cpp b/llvm/lib/IR/Instructions.cpp index da5b02b..5e25c31 100644 --- a/llvm/lib/IR/Instructions.cpp +++ b/llvm/lib/IR/Instructions.cpp @@ -4154,6 +4154,11 @@ StringRef CmpInst::getPredicateName(Predicate Pred) { } } +raw_ostream &llvm::operator<<(raw_ostream &OS, CmpInst::Predicate Pred) { + OS << CmpInst::getPredicateName(Pred); + return OS; +} + ICmpInst::Predicate ICmpInst::getSignedPredicate(Predicate pred) { switch (pred) { default: llvm_unreachable("Unknown icmp predicate!"); diff --git a/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp b/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp index d49f893..b7ee55d 100644 --- a/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp +++ b/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp @@ -345,7 +345,7 @@ static std::string getBranchCondString(Instruction *TI) { std::string result; raw_string_ostream OS(result); - OS << CmpInst::getPredicateName(CI->getPredicate()) << "_"; + OS << CI->getPredicate() << "_"; CI->getOperand(0)->getType()->print(OS, true); Value *RHS = CI->getOperand(1); diff --git a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp index e5ec355..2aa76c6 100644 --- a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp +++ b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp @@ -975,7 +975,7 @@ void ConstraintInfo::addFact(CmpInst::Predicate Pred, Value *A, Value *B, if (!R.isValid(*this)) return; - LLVM_DEBUG(dbgs() << "Adding '" << CmpInst::getPredicateName(Pred) << " "; + LLVM_DEBUG(dbgs() << "Adding '" << Pred << " "; A->printAsOperand(dbgs(), false); dbgs() << ", "; B->printAsOperand(dbgs(), false); dbgs() << "'\n"); bool Added = false; diff --git a/llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp b/llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp index 52a4bc8..463ea1d 100644 --- a/llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp +++ b/llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp @@ -671,8 +671,7 @@ static bool isSafeDecreasingBound(const SCEV *Start, LLVM_DEBUG(dbgs() << "irce: Start: " << *Start << "\n"); LLVM_DEBUG(dbgs() << "irce: Step: " << *Step << "\n"); LLVM_DEBUG(dbgs() << "irce: BoundSCEV: " << *BoundSCEV << "\n"); - LLVM_DEBUG(dbgs() << "irce: Pred: " << ICmpInst::getPredicateName(Pred) - << "\n"); + LLVM_DEBUG(dbgs() << "irce: Pred: " << Pred << "\n"); LLVM_DEBUG(dbgs() << "irce: LatchExitBrIdx: " << LatchBrExitIdx << "\n"); bool IsSigned = ICmpInst::isSigned(Pred); @@ -719,8 +718,7 @@ static bool isSafeIncreasingBound(const SCEV *Start, LLVM_DEBUG(dbgs() << "irce: Start: " << *Start << "\n"); LLVM_DEBUG(dbgs() << "irce: Step: " << *Step << "\n"); LLVM_DEBUG(dbgs() << "irce: BoundSCEV: " << *BoundSCEV << "\n"); - LLVM_DEBUG(dbgs() << "irce: Pred: " << ICmpInst::getPredicateName(Pred) - << "\n"); + LLVM_DEBUG(dbgs() << "irce: Pred: " << Pred << "\n"); LLVM_DEBUG(dbgs() << "irce: LatchExitBrIdx: " << LatchBrExitIdx << "\n"); bool IsSigned = ICmpInst::isSigned(Pred); diff --git a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp index 935a156..18d4208 100644 --- a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp +++ b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp @@ -714,7 +714,7 @@ void VPWidenRecipe::print(raw_ostream &O, const Twine &Indent, const Instruction *UI = getUnderlyingInstr(); O << " = " << UI->getOpcodeName() << " "; if (auto *Cmp = dyn_cast(UI)) - O << CmpInst::getPredicateName(Cmp->getPredicate()) << " "; + O << Cmp->getPredicate() << " "; printOperands(O, SlotTracker); } -- 2.7.4