From ffa9916d9e02b8de9c39e0aaf5cd1764f10076a2 Mon Sep 17 00:00:00 2001 From: William Qiu Date: Wed, 15 Mar 2023 13:58:13 +0800 Subject: [PATCH] riscv: dts: starfive: Add syscon node Add stg_syscon/sys_syscon/aon_syscon node for JH7110 Soc. Signed-off-by: William Qiu Reviewed-by: Conor Dooley Reviewed-by: Emil Renner Berthing --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 417f7f5..cd7a6a1 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -362,6 +362,11 @@ status = "disabled"; }; + stg_syscon: syscon@10240000 { + compatible = "starfive,jh7110-stg-syscon", "syscon"; + reg = <0x0 0x10240000 0x0 0x1000>; + }; + uart3: serial@12000000 { compatible = "snps,dw-apb-uart"; reg = <0x0 0x12000000 0x0 0x10000>; @@ -466,6 +471,11 @@ #reset-cells = <1>; }; + sys_syscon: syscon@13030000 { + compatible = "starfive,jh7110-sys-syscon", "syscon"; + reg = <0x0 0x13030000 0x0 0x1000>; + }; + sysgpio: pinctrl@13040000 { compatible = "starfive,jh7110-sys-pinctrl"; reg = <0x0 0x13040000 0x0 0x10000>; @@ -495,6 +505,11 @@ #reset-cells = <1>; }; + aon_syscon: syscon@17010000 { + compatible = "starfive,jh7110-aon-syscon", "syscon"; + reg = <0x0 0x17010000 0x0 0x1000>; + }; + aongpio: pinctrl@17020000 { compatible = "starfive,jh7110-aon-pinctrl"; reg = <0x0 0x17020000 0x0 0x10000>; -- 2.7.4