From fe0d9bb6ebe5334c4efc31a48979c5f39597f323 Mon Sep 17 00:00:00 2001 From: Michael Kuperstein Date: Wed, 12 Aug 2015 11:27:26 +0000 Subject: [PATCH] [X86] Disable mul -> shl + lea combine when compiling for minsize Differential Revision: http://reviews.llvm.org/D11904 llvm-svn: 244740 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 4 ++++ llvm/test/CodeGen/X86/imul.ll | 18 ++++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 4da5851..986646a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -23436,6 +23436,10 @@ static SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG, /// LEA + SHL, LEA + LEA. static SDValue PerformMulCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI) { + // An imul is usually smaller than the alternative sequence. + if (DAG.getMachineFunction().getFunction()->optForMinSize()) + return SDValue(); + if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) return SDValue(); diff --git a/llvm/test/CodeGen/X86/imul.ll b/llvm/test/CodeGen/X86/imul.ll index c64b4e3..99a4690 100644 --- a/llvm/test/CodeGen/X86/imul.ll +++ b/llvm/test/CodeGen/X86/imul.ll @@ -108,3 +108,21 @@ define i64 @mul40_64(i64 %A) { %mul = mul i64 %A, 40 ret i64 %mul } + +define i32 @mul4_32_minsize(i32 %A) minsize { +; X64-LABEL: mul4_32_minsize: +; X64: leal +; X86-LABEL: mul4_32_minsize: +; X86: shll + %mul = mul i32 %A, 4 + ret i32 %mul +} + +define i32 @mul40_32_minsize(i32 %A) minsize { +; X64-LABEL: mul40_32_minsize: +; X64: imull +; X86-LABEL: mul40_32_minsize: +; X86: imull + %mul = mul i32 %A, 40 + ret i32 %mul +} -- 2.7.4