From fe0750b97943070c4dc652afa3628aee0b0d0ebb Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sat, 24 Jun 2023 06:56:01 -0400 Subject: [PATCH] SeparateConstOffsetFromGEP: Reorder run lines Testing codegen in test/Transforms is questionable to begin with, but it's more reasonable to see failures on the IR half before ISA checks. --- .../Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll b/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll index 84fc8da..5652b66 100644 --- a/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll +++ b/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -mtriple=nvptx64-nvidia-cuda -mcpu=sm_20 \ -; RUN: | FileCheck %s --check-prefix=PTX ; RUN: opt < %s -mtriple=nvptx64-nvidia-cuda -S -passes=separate-const-offset-from-gep,gvn \ ; RUN: -reassociate-geps-verify-no-dead-code \ ; RUN: | FileCheck %s --check-prefix=IR +; RUN: llc < %s -mtriple=nvptx64-nvidia-cuda -mcpu=sm_20 \ +; RUN: | FileCheck %s --check-prefix=PTX ; Verifies the SeparateConstOffsetFromGEP pass. ; The following code computes -- 2.7.4