From fe047fbccc85057c1e0402d24b1c1ceb5e498eff Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Fri, 13 Mar 2020 14:58:16 +0000 Subject: [PATCH] [X86] LowerEXTRACT_VECTOR_ELT - pull out repeated getOperand() calls. NFC. Also, cleanup LowerEXTRACT_VECTOR_ELT_SSE4 comments which had references to non-constant extraction indices. --- llvm/lib/Target/X86/X86ISelLowering.cpp | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 87e6503..e602d87 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -17821,14 +17821,16 @@ SDValue X86TargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const { static SDValue LowerEXTRACT_VECTOR_ELT_SSE4(SDValue Op, SelectionDAG &DAG) { MVT VT = Op.getSimpleValueType(); + SDValue Vec = Op.getOperand(0); + SDValue Idx = Op.getOperand(1); + assert(isa(Idx) && "Constant index expected"); SDLoc dl(Op); - if (!Op.getOperand(0).getSimpleValueType().is128BitVector()) + if (!Vec.getSimpleValueType().is128BitVector()) return SDValue(); if (VT.getSizeInBits() == 8) { - SDValue Extract = DAG.getNode(X86ISD::PEXTRB, dl, MVT::i32, - Op.getOperand(0), Op.getOperand(1)); + SDValue Extract = DAG.getNode(X86ISD::PEXTRB, dl, MVT::i32, Vec, Idx); return DAG.getNode(ISD::TRUNCATE, dl, VT, Extract); } @@ -17841,22 +17843,17 @@ static SDValue LowerEXTRACT_VECTOR_ELT_SSE4(SDValue Op, SelectionDAG &DAG) { if (!Op.hasOneUse()) return SDValue(); SDNode *User = *Op.getNode()->use_begin(); - if ((User->getOpcode() != ISD::STORE || - isNullConstant(Op.getOperand(1))) && + if ((User->getOpcode() != ISD::STORE || isNullConstant(Idx)) && (User->getOpcode() != ISD::BITCAST || User->getValueType(0) != MVT::i32)) return SDValue(); SDValue Extract = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, - DAG.getBitcast(MVT::v4i32, Op.getOperand(0)), - Op.getOperand(1)); + DAG.getBitcast(MVT::v4i32, Vec), Idx); return DAG.getBitcast(MVT::f32, Extract); } - if (VT == MVT::i32 || VT == MVT::i64) { - // ExtractPS/pextrq works with constant index. - if (isa(Op.getOperand(1))) + if (VT == MVT::i32 || VT == MVT::i64) return Op; - } return SDValue(); } @@ -17986,9 +17983,7 @@ X86TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, DAG.getBitcast(MVT::v4i32, Vec), Idx)); - // Transform it so it match pextrw which produces a 32-bit result. - SDValue Extract = DAG.getNode(X86ISD::PEXTRW, dl, MVT::i32, - Op.getOperand(0), Op.getOperand(1)); + SDValue Extract = DAG.getNode(X86ISD::PEXTRW, dl, MVT::i32, Vec, Idx); return DAG.getNode(ISD::TRUNCATE, dl, VT, Extract); } -- 2.7.4