From fddb7928464d05f3d46852a801aa9ec57be5e74f Mon Sep 17 00:00:00 2001 From: Chanho Park Date: Tue, 7 Jun 2022 16:02:50 +0900 Subject: [PATCH] arm64: dts: exynos: add secondary ufs devices in ExynosAutov9 Add ufs_1_phy and ufs_1 for secondary ufs hci controller and phy device. Signed-off-by: Chanho Park Link: https://lore.kernel.org/r/20220607070251.15795-2-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 32 ++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index d694975..00411d4 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -401,6 +401,38 @@ status = "disabled"; }; + ufs_1_phy: phy@17f04000 { + compatible = "samsung,exynosautov9-ufs-phy"; + reg = <0x17f04000 0xc00>; + reg-names = "phy-pma"; + samsung,pmu-syscon = <&pmu_system_controller 0x72c>; + #phy-cells = <0>; + clocks = <&xtcxo>; + clock-names = "ref_clk"; + status = "disabled"; + }; + + ufs_1: ufs@17f00000 { + compatible = "samsung,exynosautov9-ufs"; + + reg = <0x17f00000 0x100>, + <0x17f01100 0x410>, + <0x17f80000 0x8000>, + <0x17de0000 0x2200>; + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = ; + clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_ACLK>, + <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_UNIPRO>; + clock-names = "core_clk", "sclk_unipro_main"; + freq-table-hz = <0 0>, <0 0>; + pinctrl-names = "default"; + pinctrl-0 = <&ufs_rst_n_1 &ufs_refclk_out_1>; + phys = <&ufs_1_phy>; + phy-names = "ufs-phy"; + samsung,sysreg = <&syscon_fsys2 0x714>; + status = "disabled"; + }; + watchdog_cl0: watchdog@10050000 { compatible = "samsung,exynosautov9-wdt"; reg = <0x10050000 0x100>; -- 2.7.4