From fda53373f2360494d38bf705f776d32d1153be69 Mon Sep 17 00:00:00 2001
From: JF Bastien <jfb@google.com>
Date: Mon, 3 Aug 2015 00:00:11 +0000
Subject: [PATCH] WebAssembly: implement getScalarShiftAmountTy so we can shift
 by amount, with type

Summary: This currently sets the shift amount RHS to the same type as the LHS, and assumes that the LHS is a simple type. This isn't currently the case e.g. with weird integers sizes, but will eventually be true and will assert if not. That's what you get for having an experimental backend: break it and you get to keep both pieces. Most backends either set the RHS to MVT::i32 or MVT::i64, but WebAssembly is a virtual ISA and tries to have regular-looking binary operations where both operands are the same type (even if a 64-bit RHS shifter is slightly silly, hey it's free!).

Subscribers: llvm-commits, sunfish, jfb

Differential Revision: http://reviews.llvm.org/D11715

llvm-svn: 243860
---
 .../Target/WebAssembly/WebAssemblyISelLowering.cpp |  5 ++
 .../Target/WebAssembly/WebAssemblyISelLowering.h   |  2 +
 llvm/test/CodeGen/WebAssembly/integer64.ll         | 62 ++++++++++------------
 3 files changed, 36 insertions(+), 33 deletions(-)

diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index f8b4fbd..4360116 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -111,6 +111,11 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
   // FIXME: setOperationAction...
 }
 
+MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout &DL,
+                                                      EVT VT) const {
+  return VT.getSimpleVT();
+}
+
 //===----------------------------------------------------------------------===//
 // WebAssembly Lowering private implementation.
 //===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
index 3e82526..12b4fe6 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
@@ -45,6 +45,8 @@ private:
   /// right decision when generating code for different targets.
   const WebAssemblySubtarget *Subtarget;
 
+  MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;
+
   bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
                       bool isVarArg,
                       const SmallVectorImpl<ISD::OutputArg> &Outs,
diff --git a/llvm/test/CodeGen/WebAssembly/integer64.ll b/llvm/test/CodeGen/WebAssembly/integer64.ll
index 4ac2846..540646c 100644
--- a/llvm/test/CodeGen/WebAssembly/integer64.ll
+++ b/llvm/test/CodeGen/WebAssembly/integer64.ll
@@ -109,39 +109,35 @@ define i64 @xor64(i64 %x, i64 %y) {
   ret i64 %a
 }
 
-; FIXME: 64-bit shifts have an extra truncate of the input shift value, which
-;        WebAssembly hasn't taught isel to match yet. Fix with
-;        getScalarShiftAmountTy.
-
-; C;HECK-LABEL: shl64:
-; C;HECK-NEXT: (setlocal @0 (argument 1))
-; C;HECK-NEXT: (setlocal @1 (argument 0))
-; C;HECK-NEXT: (setlocal @2 (SHL_I64 @1 @0))
-; C;HECK-NEXT: (return @2)
-;define i64 @shl64(i64 %x, i64 %y) {
-;  %a = shl i64 %x, %y
-;  ret i64 %a
-;}
-
-; C;HECK-LABEL: shr64:
-; C;HECK-NEXT: (setlocal @0 (argument 1))
-; C;HECK-NEXT: (setlocal @1 (argument 0))
-; C;HECK-NEXT: (setlocal @2 (SHR_I64 @1 @0))
-; C;HECK-NEXT: (return @2)
-;define i64 @shr64(i64 %x, i64 %y) {
-;  %a = lshr i64 %x, %y
-;  ret i64 %a
-;}
-
-; C;HECK-LABEL: sar64:
-; C;HECK-NEXT: (setlocal @0 (argument 1))
-; C;HECK-NEXT: (setlocal @1 (argument 0))
-; C;HECK-NEXT: (setlocal @2 (SAR_I64 @1 @0))
-; C;HECK-NEXT: (return @2)
-;define i64 @sar64(i64 %x, i64 %y) {
-;  %a = ashr i64 %x, %y
-;  ret i64 %a
-;}
+; CHECK-LABEL: shl64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SHL_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @shl64(i64 %x, i64 %y) {
+  %a = shl i64 %x, %y
+  ret i64 %a
+}
+
+; CHECK-LABEL: shr64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SHR_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @shr64(i64 %x, i64 %y) {
+  %a = lshr i64 %x, %y
+  ret i64 %a
+}
+
+; CHECK-LABEL: sar64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SAR_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @sar64(i64 %x, i64 %y) {
+  %a = ashr i64 %x, %y
+  ret i64 %a
+}
 
 ; CHECK-LABEL: clz64:
 ; CHECK-NEXT: (setlocal @0 (argument 0))
-- 
2.7.4