From fce7a7aa9f04c1a3c6b12def2f46ecffc006d436 Mon Sep 17 00:00:00 2001 From: Ivan Kosarev Date: Thu, 24 Nov 2022 10:50:00 +0000 Subject: [PATCH] [AMDGPU][AsmParser] Refine parsing instruction operands. Eliminates the need for working around optional and token operands being mistakenly parsed as expressions. Reviewed By: dp Differential Revision: https://reviews.llvm.org/D138492 --- llvm/include/llvm/Target/Target.td | 10 + llvm/lib/Target/AMDGPU/AMDGPU.td | 4 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 424 ++++++++--------- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 6 +- llvm/test/MC/AMDGPU/ds-err.s | 2 +- llvm/test/MC/AMDGPU/gfx11_asm_exp.s | 4 +- llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s | 36 +- llvm/test/MC/AMDGPU/gfx11_asm_wmma.s | 32 +- llvm/test/MC/AMDGPU/gfx9-asm-err.s | 2 +- llvm/test/MC/AMDGPU/gfx90a_asm_features.s | 8 +- llvm/test/MC/AMDGPU/gfx90a_err.s | 2 +- llvm/test/MC/AMDGPU/gfx940_err.s | 8 +- llvm/test/MC/AMDGPU/mimg-err.s | 14 +- llvm/test/MC/AMDGPU/mtbuf.s | 2 +- llvm/test/MC/AMDGPU/mubuf.s | 44 +- llvm/test/MC/AMDGPU/smem.s | 8 +- llvm/test/MC/AMDGPU/vop3-errs.s | 7 +- llvm/test/MC/AMDGPU/vop3-gfx9.s | 34 +- llvm/test/MC/AMDGPU/vop_dpp.s | 112 ++--- llvm/test/MC/AMDGPU/vop_sdwa.s | 504 ++++++++++----------- llvm/utils/TableGen/AsmMatcherEmitter.cpp | 35 +- 21 files changed, 660 insertions(+), 638 deletions(-) diff --git a/llvm/include/llvm/Target/Target.td b/llvm/include/llvm/Target/Target.td index 234bf8d..dd74c89 100644 --- a/llvm/include/llvm/Target/Target.td +++ b/llvm/include/llvm/Target/Target.td @@ -1479,6 +1479,16 @@ class AsmParser { // to matching the parsed instruction, so to allow more detailed error // messages. bit ReportMultipleNearMisses = false; + + // OperandParserMethod - If non-empty, this is the name of a custom + // member function of the AsmParser class to call for every instruction + // operand to be parsed. + string OperandParserMethod = ""; + + // CallCustomParserForAllOperands - Set to true if the custom parser + // method shall be called for all operands as opposed to only those + // that have their own specified custom parsers. + bit CallCustomParserForAllOperands = false; } def DefaultAsmParser : AsmParser; diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td index 917691d..bc94996 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPU.td +++ b/llvm/lib/Target/AMDGPU/AMDGPU.td @@ -1337,6 +1337,10 @@ def AMDGPUAsmParser : AsmParser { // Some of the R600 registers have the same name, so this crashes. // For example T0_XYZW and T0_XY both have the asm name T0. let ShouldEmitMatchRegisterName = 0; + + // Call the custom operand parser for all operands. + let OperandParserMethod = "parseCustomOperand"; + let CallCustomParserForAllOperands = true; } def AMDGPUAsmWriter : AsmWriter { diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index 882cdf2..974e2315 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -207,16 +207,7 @@ private: }; public: - bool isToken() const override { - if (Kind == Token) - return true; - - // When parsing operands, we can't always tell if something was meant to be - // a token, like 'gds', or an expression that references a global variable. - // In this case, we assume the string is an expression, and if we need to - // interpret is a token, then we treat the symbol name as the token. - return isSymbolRefExpr(); - } + bool isToken() const override { return Kind == Token; } bool isSymbolRefExpr() const { return isExpr() && Expr && isa(Expr); @@ -892,18 +883,8 @@ public: bool isWaitVDST() const; bool isWaitEXP() const; - StringRef getExpressionAsToken() const { - assert(isExpr()); - const MCSymbolRefExpr *S = cast(Expr); - return S->getSymbol().getName(); - } - StringRef getToken() const { assert(isToken()); - - if (Kind == Expression) - return getExpressionAsToken(); - return StringRef(Tok.Data, Tok.Length); } @@ -1271,10 +1252,6 @@ public: class AMDGPUAsmParser : public MCTargetAsmParser { MCAsmParser &Parser; - // Number of extra operands parsed after the first optional operand. - // This may be necessary to skip hardcoded mandatory operands. - static const unsigned MAX_OPR_LOOKAHEAD = 8; - unsigned ForcedEncodingSize = 0; bool ForcedDPP = false; bool ForcedSDWA = false; @@ -1561,6 +1538,8 @@ public: SMLoc NameLoc, OperandVector &Operands) override; //bool ProcessInstruction(MCInst &Inst); + OperandMatchResultTy parseTokenOp(StringRef Name, OperandVector &Operands); + OperandMatchResultTy parseIntWithPrefix(const char *Prefix, int64_t &Int); OperandMatchResultTy @@ -1728,8 +1707,8 @@ private: public: void onBeginOfFile() override; - OperandMatchResultTy parseOptionalOperand(OperandVector &Operands); - OperandMatchResultTy parseOptionalOpr(OperandVector &Operands); + OperandMatchResultTy parseCustomOperand(OperandVector &Operands, + unsigned MCK); OperandMatchResultTy parseExpTgt(OperandVector &Operands); OperandMatchResultTy parseSendMsgOp(OperandVector &Operands); @@ -3086,8 +3065,6 @@ AMDGPUAsmParser::isRegOrOperandModifier(const AsmToken &Token, const AsmToken &N // -|...| // -abs(...) // name:... -// Note that simple opcode modifiers like 'gds' may be parsed as -// expressions; this is a special case. See getExpressionAsToken. // bool AMDGPUAsmParser::isModifier() { @@ -5927,6 +5904,16 @@ bool AMDGPUAsmParser::ParseInstruction(ParseInstructionInfo &Info, // Utility functions //===----------------------------------------------------------------------===// +OperandMatchResultTy AMDGPUAsmParser::parseTokenOp(StringRef Name, + OperandVector &Operands) { + SMLoc S = getLoc(); + if (!trySkipId(Name)) + return MatchOperand_NoMatch; + + Operands.push_back(AMDGPUOperand::CreateToken(this, Name, S)); + return MatchOperand_Success; +} + OperandMatchResultTy AMDGPUAsmParser::parseIntWithPrefix(const char *Prefix, int64_t &IntVal) { @@ -6033,75 +6020,84 @@ AMDGPUAsmParser::parseNamedBit(StringRef Name, OperandVector &Operands, OperandMatchResultTy AMDGPUAsmParser::parseCPol(OperandVector &Operands) { - unsigned CPolOn = 0; - unsigned CPolOff = 0; - SMLoc S = getLoc(); + OperandMatchResultTy Res = MatchOperand_NoMatch; - StringRef Mnemo = ((AMDGPUOperand &)*Operands[0]).getToken(); - if (isGFX940() && !Mnemo.startswith("s_")) { - if (trySkipId("sc0")) - CPolOn = AMDGPU::CPol::SC0; - else if (trySkipId("nosc0")) - CPolOff = AMDGPU::CPol::SC0; - else if (trySkipId("nt")) - CPolOn = AMDGPU::CPol::NT; - else if (trySkipId("nont")) - CPolOff = AMDGPU::CPol::NT; - else if (trySkipId("sc1")) - CPolOn = AMDGPU::CPol::SC1; - else if (trySkipId("nosc1")) - CPolOff = AMDGPU::CPol::SC1; + for (;;) { + unsigned CPolOn = 0; + unsigned CPolOff = 0; + SMLoc S = getLoc(); + + StringRef Mnemo = ((AMDGPUOperand &)*Operands[0]).getToken(); + if (isGFX940() && !Mnemo.startswith("s_")) { + if (trySkipId("sc0")) + CPolOn = AMDGPU::CPol::SC0; + else if (trySkipId("nosc0")) + CPolOff = AMDGPU::CPol::SC0; + else if (trySkipId("nt")) + CPolOn = AMDGPU::CPol::NT; + else if (trySkipId("nont")) + CPolOff = AMDGPU::CPol::NT; + else if (trySkipId("sc1")) + CPolOn = AMDGPU::CPol::SC1; + else if (trySkipId("nosc1")) + CPolOff = AMDGPU::CPol::SC1; + else + break; + } else if (trySkipId("glc")) + CPolOn = AMDGPU::CPol::GLC; + else if (trySkipId("noglc")) + CPolOff = AMDGPU::CPol::GLC; + else if (trySkipId("slc")) + CPolOn = AMDGPU::CPol::SLC; + else if (trySkipId("noslc")) + CPolOff = AMDGPU::CPol::SLC; + else if (trySkipId("dlc")) + CPolOn = AMDGPU::CPol::DLC; + else if (trySkipId("nodlc")) + CPolOff = AMDGPU::CPol::DLC; + else if (trySkipId("scc")) + CPolOn = AMDGPU::CPol::SCC; + else if (trySkipId("noscc")) + CPolOff = AMDGPU::CPol::SCC; else - return MatchOperand_NoMatch; - } - else if (trySkipId("glc")) - CPolOn = AMDGPU::CPol::GLC; - else if (trySkipId("noglc")) - CPolOff = AMDGPU::CPol::GLC; - else if (trySkipId("slc")) - CPolOn = AMDGPU::CPol::SLC; - else if (trySkipId("noslc")) - CPolOff = AMDGPU::CPol::SLC; - else if (trySkipId("dlc")) - CPolOn = AMDGPU::CPol::DLC; - else if (trySkipId("nodlc")) - CPolOff = AMDGPU::CPol::DLC; - else if (trySkipId("scc")) - CPolOn = AMDGPU::CPol::SCC; - else if (trySkipId("noscc")) - CPolOff = AMDGPU::CPol::SCC; - else - return MatchOperand_NoMatch; + break; - if (!isGFX10Plus() && ((CPolOn | CPolOff) & AMDGPU::CPol::DLC)) { - Error(S, "dlc modifier is not supported on this GPU"); - return MatchOperand_ParseFail; - } + if (!isGFX10Plus() && ((CPolOn | CPolOff) & AMDGPU::CPol::DLC)) { + Error(S, "dlc modifier is not supported on this GPU"); + return MatchOperand_ParseFail; + } - if (!isGFX90A() && ((CPolOn | CPolOff) & AMDGPU::CPol::SCC)) { - Error(S, "scc modifier is not supported on this GPU"); - return MatchOperand_ParseFail; - } + if (!isGFX90A() && ((CPolOn | CPolOff) & AMDGPU::CPol::SCC)) { + Error(S, "scc modifier is not supported on this GPU"); + return MatchOperand_ParseFail; + } - if (CPolSeen & (CPolOn | CPolOff)) { - Error(S, "duplicate cache policy modifier"); - return MatchOperand_ParseFail; - } + if (CPolSeen & (CPolOn | CPolOff)) { + Error(S, "duplicate cache policy modifier"); + return MatchOperand_ParseFail; + } - CPolSeen |= (CPolOn | CPolOff); + CPolSeen |= (CPolOn | CPolOff); + Res = MatchOperand_Success; - for (unsigned I = 1; I != Operands.size(); ++I) { - AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]); - if (Op.isCPol()) { - Op.setImm((Op.getImm() | CPolOn) & ~CPolOff); - return MatchOperand_Success; + AMDGPUOperand *CPolOp = nullptr; + for (unsigned I = 1; I != Operands.size(); ++I) { + AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]); + if (Op.isCPol()) { + CPolOp = &Op; + break; + } } - } - Operands.push_back(AMDGPUOperand::CreateImm(this, CPolOn, S, - AMDGPUOperand::ImmTyCPol)); + if (CPolOp) { + CPolOp->setImm((CPolOp->getImm() | CPolOn) & ~CPolOff); + } else { + Operands.push_back( + AMDGPUOperand::CreateImm(this, CPolOn, S, AMDGPUOperand::ImmTyCPol)); + } + } - return MatchOperand_Success; + return Res; } static void addOptionalImmOperand( @@ -7588,12 +7584,9 @@ AMDGPUAsmParser::parseSwizzleOp(OperandVector &Operands) { Operands.push_back(AMDGPUOperand::CreateImm(this, Imm, S, AMDGPUOperand::ImmTySwizzle)); - return Ok? MatchOperand_Success : MatchOperand_ParseFail; - } else { - // Swizzle "offset" operand is optional. - // If it is omitted, try parsing other optional operands. - return parseOptionalOpr(Operands); + return Ok ? MatchOperand_Success : MatchOperand_ParseFail; } + return MatchOperand_NoMatch; } bool @@ -8018,55 +8011,6 @@ static bool ConvertBoundCtrl(int64_t &BoundCtrl) { return false; } -// Note: the order in this table matches the order of operands in AsmString. -static const OptionalOperand AMDGPUOptionalOperandTable[] = { - {"offen", AMDGPUOperand::ImmTyOffen, true, nullptr}, - {"idxen", AMDGPUOperand::ImmTyIdxen, true, nullptr}, - {"addr64", AMDGPUOperand::ImmTyAddr64, true, nullptr}, - {"offset0", AMDGPUOperand::ImmTyOffset0, false, nullptr}, - {"offset1", AMDGPUOperand::ImmTyOffset1, false, nullptr}, - {"gds", AMDGPUOperand::ImmTyGDS, true, nullptr}, - {"lds", AMDGPUOperand::ImmTyLDS, true, nullptr}, - {"offset", AMDGPUOperand::ImmTyOffset, false, nullptr}, - {"inst_offset", AMDGPUOperand::ImmTyInstOffset, false, nullptr}, - {"", AMDGPUOperand::ImmTyCPol, false, nullptr}, - {"swz", AMDGPUOperand::ImmTySWZ, true, nullptr}, - {"tfe", AMDGPUOperand::ImmTyTFE, true, nullptr}, - {"d16", AMDGPUOperand::ImmTyD16, true, nullptr}, - {"high", AMDGPUOperand::ImmTyHigh, true, nullptr}, - {"clamp", AMDGPUOperand::ImmTyClampSI, true, nullptr}, - {"omod", AMDGPUOperand::ImmTyOModSI, false, ConvertOmodMul}, - {"unorm", AMDGPUOperand::ImmTyUNorm, true, nullptr}, - {"da", AMDGPUOperand::ImmTyDA, true, nullptr}, - {"r128", AMDGPUOperand::ImmTyR128A16, true, nullptr}, - {"a16", AMDGPUOperand::ImmTyA16, true, nullptr}, - {"lwe", AMDGPUOperand::ImmTyLWE, true, nullptr}, - {"d16", AMDGPUOperand::ImmTyD16, true, nullptr}, - {"dmask", AMDGPUOperand::ImmTyDMask, false, nullptr}, - {"dim", AMDGPUOperand::ImmTyDim, false, nullptr}, - {"dst_sel", AMDGPUOperand::ImmTySdwaDstSel, false, nullptr}, - {"src0_sel", AMDGPUOperand::ImmTySdwaSrc0Sel, false, nullptr}, - {"src1_sel", AMDGPUOperand::ImmTySdwaSrc1Sel, false, nullptr}, - {"dst_unused", AMDGPUOperand::ImmTySdwaDstUnused, false, nullptr}, - {"compr", AMDGPUOperand::ImmTyExpCompr, true, nullptr }, - {"vm", AMDGPUOperand::ImmTyExpVM, true, nullptr}, - {"op_sel", AMDGPUOperand::ImmTyOpSel, false, nullptr}, - {"op_sel_hi", AMDGPUOperand::ImmTyOpSelHi, false, nullptr}, - {"neg_lo", AMDGPUOperand::ImmTyNegLo, false, nullptr}, - {"neg_hi", AMDGPUOperand::ImmTyNegHi, false, nullptr}, - {"dpp8", AMDGPUOperand::ImmTyDPP8, false, nullptr}, - {"dpp_ctrl", AMDGPUOperand::ImmTyDppCtrl, false, nullptr}, - {"row_mask", AMDGPUOperand::ImmTyDppRowMask, false, nullptr}, - {"bank_mask", AMDGPUOperand::ImmTyDppBankMask, false, nullptr}, - {"bound_ctrl", AMDGPUOperand::ImmTyDppBoundCtrl, false, ConvertBoundCtrl}, - {"fi", AMDGPUOperand::ImmTyDppFi, false, nullptr}, - {"blgp", AMDGPUOperand::ImmTyBLGP, false, nullptr}, - {"cbsz", AMDGPUOperand::ImmTyCBSZ, false, nullptr}, - {"abid", AMDGPUOperand::ImmTyABID, false, nullptr}, - {"wait_vdst", AMDGPUOperand::ImmTyWaitVDST, false, nullptr}, - {"wait_exp", AMDGPUOperand::ImmTyWaitEXP, false, nullptr} -}; - void AMDGPUAsmParser::onBeginOfFile() { if (!getParser().getStreamer().getTargetStreamer() || getSTI().getTargetTriple().getArch() == Triple::r600) @@ -8079,76 +8023,6 @@ void AMDGPUAsmParser::onBeginOfFile() { getTargetStreamer().EmitDirectiveAMDGCNTarget(); } -OperandMatchResultTy AMDGPUAsmParser::parseOptionalOperand(OperandVector &Operands) { - - OperandMatchResultTy res = parseOptionalOpr(Operands); - - // This is a hack to enable hardcoded mandatory operands which follow - // optional operands. - // - // Current design assumes that all operands after the first optional operand - // are also optional. However implementation of some instructions violates - // this rule (see e.g. flat/global atomic which have hardcoded 'glc' operands). - // - // To alleviate this problem, we have to (implicitly) parse extra operands - // to make sure autogenerated parser of custom operands never hit hardcoded - // mandatory operands. - - for (unsigned i = 0; i < MAX_OPR_LOOKAHEAD; ++i) { - if (res != MatchOperand_Success || - isToken(AsmToken::EndOfStatement)) - break; - - trySkipToken(AsmToken::Comma); - res = parseOptionalOpr(Operands); - } - - return res; -} - -OperandMatchResultTy AMDGPUAsmParser::parseOptionalOpr(OperandVector &Operands) { - OperandMatchResultTy res; - for (const OptionalOperand &Op : AMDGPUOptionalOperandTable) { - // try to parse any optional operand here - if (Op.IsBit) { - res = parseNamedBit(Op.Name, Operands, Op.Type); - } else if (Op.Type == AMDGPUOperand::ImmTyOModSI) { - res = parseOModOperand(Operands); - } else if (Op.Type == AMDGPUOperand::ImmTySdwaDstSel || - Op.Type == AMDGPUOperand::ImmTySdwaSrc0Sel || - Op.Type == AMDGPUOperand::ImmTySdwaSrc1Sel) { - res = parseSDWASel(Operands, Op.Name, Op.Type); - } else if (Op.Type == AMDGPUOperand::ImmTySdwaDstUnused) { - res = parseSDWADstUnused(Operands); - } else if (Op.Type == AMDGPUOperand::ImmTyOpSel || - Op.Type == AMDGPUOperand::ImmTyOpSelHi || - Op.Type == AMDGPUOperand::ImmTyNegLo || - Op.Type == AMDGPUOperand::ImmTyNegHi) { - res = parseOperandArrayWithPrefix(Op.Name, Operands, Op.Type, - Op.ConvertResult); - } else if (Op.Type == AMDGPUOperand::ImmTyDim) { - res = parseDim(Operands); - } else if (Op.Type == AMDGPUOperand::ImmTyCPol) { - res = parseCPol(Operands); - } else if (Op.Type == AMDGPUOperand::ImmTyDPP8) { - res = parseDPP8(Operands); - } else if (Op.Type == AMDGPUOperand::ImmTyDppCtrl) { - res = parseDPPCtrl(Operands); - } else { - res = parseIntWithPrefix(Op.Name, Operands, Op.Type, Op.ConvertResult); - if (Op.Type == AMDGPUOperand::ImmTyBLGP && res == MatchOperand_NoMatch) { - res = parseOperandArrayWithPrefix("neg", Operands, - AMDGPUOperand::ImmTyBLGP, - nullptr); - } - } - if (res != MatchOperand_NoMatch) { - return res; - } - } - return MatchOperand_NoMatch; -} - OperandMatchResultTy AMDGPUAsmParser::parseOModOperand(OperandVector &Operands) { StringRef Name = getTokenStr(); if (Name == "mul") { @@ -9242,6 +9116,133 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUAsmParser() { #define GET_MNEMONIC_CHECKER #include "AMDGPUGenAsmMatcher.inc" +OperandMatchResultTy +AMDGPUAsmParser::parseCustomOperand(OperandVector &Operands, unsigned MCK) { + switch (MCK) { + case MCK_addr64: + return parseTokenOp("addr64", Operands); + case MCK_done: + return parseTokenOp("done", Operands); + case MCK_idxen: + return parseTokenOp("idxen", Operands); + case MCK_lds: + return parseTokenOp("lds", Operands); + case MCK_offen: + return parseTokenOp("offen", Operands); + case MCK_off: + return parseTokenOp("off", Operands); + case MCK_row_95_en: + return parseTokenOp("row_en", Operands); + case MCK_ImmABID: + return parseIntWithPrefix("abid", Operands, AMDGPUOperand::ImmTyABID); + case MCK_ImmBankMask: + return parseIntWithPrefix("bank_mask", Operands, + AMDGPUOperand::ImmTyDppBankMask); + case MCK_ImmBLGP: { + OperandMatchResultTy Res = + parseIntWithPrefix("blgp", Operands, AMDGPUOperand::ImmTyBLGP); + if (Res == MatchOperand_NoMatch) { + Res = parseOperandArrayWithPrefix("neg", Operands, + AMDGPUOperand::ImmTyBLGP); + } + return Res; + } + case MCK_ImmBoundCtrl: + return parseIntWithPrefix("bound_ctrl", Operands, + AMDGPUOperand::ImmTyDppBoundCtrl, + ConvertBoundCtrl); + case MCK_ImmCBSZ: + return parseIntWithPrefix("cbsz", Operands, AMDGPUOperand::ImmTyCBSZ); + case MCK_ImmClampSI: + return parseNamedBit("clamp", Operands, AMDGPUOperand::ImmTyClampSI); + case MCK_ImmCPol: + return parseCPol(Operands); + case MCK_ImmD16: + return parseNamedBit("d16", Operands, AMDGPUOperand::ImmTyD16); + case MCK_ImmDA: + return parseNamedBit("da", Operands, AMDGPUOperand::ImmTyDA); + case MCK_ImmDMask: + return parseIntWithPrefix("dmask", Operands, AMDGPUOperand::ImmTyDMask); + case MCK_ImmExpCompr: + return parseNamedBit("compr", Operands, AMDGPUOperand::ImmTyExpCompr); + case MCK_ImmExpVM: + return parseNamedBit("vm", Operands, AMDGPUOperand::ImmTyExpVM); + case MCK_ImmFI: + return parseIntWithPrefix("fi", Operands, AMDGPUOperand::ImmTyDppFi); + case MCK_gds: + case MCK_ImmGDS: + return parseNamedBit("gds", Operands, AMDGPUOperand::ImmTyGDS); + case MCK_ImmGFX10A16: + return parseNamedBit("a16", Operands, AMDGPUOperand::ImmTyA16); + case MCK_ImmHigh: + return parseNamedBit("high", Operands, AMDGPUOperand::ImmTyHigh); + case MCK_ImmLWE: + return parseNamedBit("lwe", Operands, AMDGPUOperand::ImmTyLWE); + case MCK_ImmNegHi: + return parseOperandArrayWithPrefix("neg_hi", Operands, + AMDGPUOperand::ImmTyNegHi); + case MCK_ImmNegLo: + return parseOperandArrayWithPrefix("neg_lo", Operands, + AMDGPUOperand::ImmTyNegLo); + case MCK_ImmOffset: + case MCK_ImmSMEMOffset: + return parseIntWithPrefix("offset", Operands, AMDGPUOperand::ImmTyOffset); + case MCK_ImmFlatOffset: { + OperandMatchResultTy Res = + parseIntWithPrefix("offset", Operands, AMDGPUOperand::ImmTyOffset); + if (Res == MatchOperand_NoMatch) { + Res = parseIntWithPrefix("inst_offset", Operands, + AMDGPUOperand::ImmTyInstOffset); + } + return Res; + } + case MCK_ImmOffset0: + return parseIntWithPrefix("offset0", Operands, AMDGPUOperand::ImmTyOffset0); + case MCK_ImmOffset1: + return parseIntWithPrefix("offset1", Operands, AMDGPUOperand::ImmTyOffset1); + case MCK_ImmOModSI: + return parseOModOperand(Operands); + case MCK_ImmOpSel: + return parseOperandArrayWithPrefix("op_sel", Operands, + AMDGPUOperand::ImmTyOpSel); + case MCK_ImmOpSelHi: + return parseOperandArrayWithPrefix("op_sel_hi", Operands, + AMDGPUOperand::ImmTyOpSelHi); + case MCK_ImmR128A16: { + OperandMatchResultTy Res = + parseNamedBit("r128", Operands, AMDGPUOperand::ImmTyR128A16); + if (Res == MatchOperand_NoMatch) + Res = parseNamedBit("a16", Operands, AMDGPUOperand::ImmTyA16); + return Res; + } + case MCK_ImmRowMask: + return parseIntWithPrefix("row_mask", Operands, + AMDGPUOperand::ImmTyDppRowMask); + case MCK_ImmSDWADstSel: + return parseSDWASel(Operands, "dst_sel", AMDGPUOperand::ImmTySdwaDstSel); + case MCK_ImmSDWADstUnused: + return parseSDWADstUnused(Operands); + case MCK_ImmSDWASrc0Sel: + return parseSDWASel(Operands, "src0_sel", AMDGPUOperand::ImmTySdwaSrc0Sel); + case MCK_ImmSDWASrc1Sel: + return parseSDWASel(Operands, "src1_sel", AMDGPUOperand::ImmTySdwaSrc1Sel); + case MCK_ImmSWZ: + return parseNamedBit("swz", Operands, AMDGPUOperand::ImmTySWZ); + case MCK_tfe: + case MCK_ImmTFE: + return parseNamedBit("tfe", Operands, AMDGPUOperand::ImmTyTFE); + case MCK_ImmUNorm: + return parseNamedBit("unorm", Operands, AMDGPUOperand::ImmTyUNorm); + case MCK_ImmWaitEXP: + return parseIntWithPrefix("wait_exp", Operands, + AMDGPUOperand::ImmTyWaitEXP); + case MCK_ImmWaitVDST: + return parseIntWithPrefix("wait_vdst", Operands, + AMDGPUOperand::ImmTyWaitVDST); + } + return tryCustomParseOperand(Operands, MCK); +} + // This function should be defined after auto-generated include so that we have // MatchClassKind enum defined unsigned AMDGPUAsmParser::validateTargetOperandClass(MCParsedAsmOperand &Op, @@ -9263,6 +9264,7 @@ unsigned AMDGPUAsmParser::validateTargetOperandClass(MCParsedAsmOperand &Op, case MCK_offen: return Operand.isOffen() ? Match_Success : Match_InvalidOperand; case MCK_tfe: + case MCK_ImmTFE: return Operand.isTFE() ? Match_Success : Match_InvalidOperand; case MCK_SSrcB32: // When operands have expression values, they will return true for isToken, diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index 950fa70..0a07efd 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -1151,7 +1151,7 @@ def SDWAVopcDst : BoolRC { class NamedMatchClass : AsmOperandClass { let Name = "Imm"#CName; let PredicateMethod = "is"#CName; - let ParserMethod = !if(Optional, "parseOptionalOperand", "parse"#CName); + let ParserMethod = !if(Optional, "", "parse"#CName); let RenderMethod = "addImmOperands"; let IsOptional = Optional; let DefaultMethod = !if(Optional, "default"#CName, ?); @@ -1209,10 +1209,6 @@ class NamedOperandU32Default1 : let OperandType = "OPERAND_IMMEDIATE" in { -def offen : NamedOperandBit<"Offen", NamedMatchClass<"Offen">>; -def idxen : NamedOperandBit<"Idxen", NamedMatchClass<"Idxen">>; -def addr64 : NamedOperandBit<"Addr64", NamedMatchClass<"Addr64">>; - def flat_offset : NamedOperandU16<"FlatOffset", NamedMatchClass<"FlatOffset">>; def offset : NamedOperandU16<"Offset", NamedMatchClass<"Offset">>; def offset0 : NamedOperandU8<"Offset0", NamedMatchClass<"Offset0">>; diff --git a/llvm/test/MC/AMDGPU/ds-err.s b/llvm/test/MC/AMDGPU/ds-err.s index 5d0a746..50c5b3e 100644 --- a/llvm/test/MC/AMDGPU/ds-err.s +++ b/llvm/test/MC/AMDGPU/ds-err.s @@ -10,7 +10,7 @@ ds_add_u32 v2, v4 offset:1000000000 ds_add_u32 v2, v4 offset:0x10000 // offset0 twice -// CHECK: error: invalid operand for instruction +// CHECK: error: not a valid operand. ds_write2_b32 v2, v4, v6 offset0:4 offset0:8 // offset1 twice diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_exp.s b/llvm/test/MC/AMDGPU/gfx11_asm_exp.s index 577e800..6613f48 100644 --- a/llvm/test/MC/AMDGPU/gfx11_asm_exp.s +++ b/llvm/test/MC/AMDGPU/gfx11_asm_exp.s @@ -11,9 +11,9 @@ exp dual_src_blend1 v2, v3, off, off // GFX11: exp dual_src_blend1 v2, v3, off, off ; encoding: [0x63,0x01,0x00,0xf8,0x02,0x03,0x00,0x00] exp mrtz v4, v3, v2, v1 row_en -// PREGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// PREGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // GFX11: exp mrtz v4, v3, v2, v1 row_en ; encoding: [0x8f,0x20,0x00,0xf8,0x04,0x03,0x02,0x01] exp mrtz v4, v3, off, off done row_en -// PREGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// PREGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // GFX11: exp mrtz v4, v3, off, off done row_en ; encoding: [0x83,0x28,0x00,0xf8,0x04,0x03,0x00,0x00] diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s index e12d6b5..bf0aa8f 100644 --- a/llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s +++ b/llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s @@ -1,58 +1,58 @@ // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefixes=NOGFX11 --implicit-check-not=error: %s image_sample_d v[64:66], [v32, v16, v8, v4, v2, v1], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_2D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_d v[64:66], [v32, v16, v8, v4, v2, v1, v0, v20, v21], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_d v[64:66], [v32, v16, v8, v4, v2, v1, v5], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_CUBE -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_d v[64:66], [v32, v16, v8, v4, v0, v20, v21], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_2D_ARRAY -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_d_cl v[64:66], [v32, v16, v8, v4, v2, v1, v0, v20, v21, v48], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_c_d v[64:66], [v32, v16, v0, v2, v1, v4, v8, v12, v16, v17], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_c_d_cl v[64:66], [v32, v16, v0, v2, v1, v4, v8, v12, v16, v17, v18], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_c_b_cl v[64:66], [v32, v16, v0, v2, v1, v5], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_d_o v[64:66], [v32, v16, v0, v2, v4, v5, v6, v7, v8, v9], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_d_cl_o v[64:66], [v32, v16, v0, v2, v4, v5, v6, v7, v8, v9, v10], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_b_cl_o v[64:66], [v32, v16, v0, v2, v1, v4], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_c_cl_o v[64:66], [v32, v16, v0, v2, v1, v4], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_c_d_o v[64:66], [v32, v16, v0, v2, v1, v4, v5, v6, v7, v8, v9], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_c_d_cl_o v[64:66], [v32, v16, v0, v2, v1, v4, v5, v6, v7, v8, v9, v10], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_c_l_o v[64:66], [v32, v16, v0, v2, v1, v4], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_c_b_o v[64:66], [v32, v16, v0, v2, v1, v4], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_sample_c_b_cl_o v[64:66], [v32, v16, v0, v2, v1, v4, v5], s[4:11], s[100:103] dmask:0x7 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_gather4_c_b_cl v[64:67], [v32, v0, v4, v5, v6, v7], s[4:11], s[100:103] dmask:0x1 dim:SQ_RSRC_IMG_3D -// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode +// NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. image_gather4_cl_o v[64:67], [v32, v0, v4, v5, v6], s[4:11], s[100:103] dmask:0x1 dim:SQ_RSRC_IMG_3D // NOGFX11: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_wmma.s b/llvm/test/MC/AMDGPU/gfx11_asm_wmma.s index 30bf97b..e5b8ec9 100644 --- a/llvm/test/MC/AMDGPU/gfx11_asm_wmma.s +++ b/llvm/test/MC/AMDGPU/gfx11_asm_wmma.s @@ -40,12 +40,12 @@ v_wmma_f32_16x16x16_f16 v[16:19], v[0:7], v[8:15], 1.0 // W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode v_wmma_f32_16x16x16_f16 v[16:23], v[0:7], v[8:15], v[16:23] op_sel:[0,0,1] -// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction -// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction +// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. +// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: not a valid operand. v_wmma_f32_16x16x16_f16 v[16:19], v[0:7], v[8:15], v[16:19] op_sel:[0,0,1] -// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction -// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction +// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. +// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: not a valid operand. v_wmma_f32_16x16x16_f16 v[16:23], v[0:7], v[8:15], v[16:23] neg_lo:[1,0,0] neg_hi:[1,0,0] // W32: v_wmma_f32_16x16x16_f16 v[16:23], v[0:7], v[8:15], v[16:23] neg_lo:[1,0,0] neg_hi:[1,0,0] ; encoding: [0x10,0x41,0x40,0xcc,0x00,0x11,0x42,0x3c] @@ -116,12 +116,12 @@ v_wmma_f32_16x16x16_bf16 v[16:19], v[0:7], v[8:15], 1.0 // W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode v_wmma_f32_16x16x16_bf16 v[16:23], v[0:7], v[8:15], v[16:23] op_sel:[0,0,1] -// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction -// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction +// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. +// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: not a valid operand. v_wmma_f32_16x16x16_bf16 v[16:19], v[0:7], v[8:15], v[16:19] op_sel:[0,0,1] -// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction -// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction +// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. +// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: not a valid operand. v_wmma_f32_16x16x16_bf16 v[16:23], v[0:7], v[8:15], v[16:23] neg_lo:[1,0,0] neg_hi:[1,0,0] // W32: v_wmma_f32_16x16x16_bf16 v[16:23], v[0:7], v[8:15], v[16:23] neg_lo:[1,0,0] neg_hi:[1,0,0] ; encoding: [0x10,0x41,0x41,0xcc,0x00,0x11,0x42,0x3c] @@ -344,12 +344,12 @@ v_wmma_i32_16x16x16_iu8 v[8:11], v[0:3], v[4:7], 1 // W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode v_wmma_i32_16x16x16_iu8 v[16:23], v[0:7], v[8:15], v[16:23] op_sel:[0,0,1] -// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction -// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction +// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. +// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: not a valid operand. v_wmma_i32_16x16x16_iu8 v[16:19], v[0:7], v[8:15], v[16:19] op_sel:[0,0,1] -// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction -// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction +// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. +// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: not a valid operand. v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], v[8:15] neg_lo:[1,0,0] neg_hi:[1,0,0] // W32: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], v[8:15] neg_lo:[1,0,0] neg_hi:[1,0,0] ; encoding: [0x08,0x41,0x44,0xcc,0x00,0x09,0x22,0x3c] @@ -420,12 +420,12 @@ v_wmma_i32_16x16x16_iu4 v[4:7], v[0:1], v[2:3], 1 // W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode v_wmma_i32_16x16x16_iu4 v[16:23], v[0:7], v[8:15], v[16:23] op_sel:[0,0,1] -// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction -// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction +// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. +// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: not a valid operand. v_wmma_i32_16x16x16_iu4 v[16:19], v[0:7], v[8:15], v[16:19] op_sel:[0,0,1] -// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction -// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction +// W32-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand. +// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: not a valid operand. v_wmma_i32_16x16x16_iu4 v[4:11], v[0:1], v[2:3], v[4:11] neg_lo:[1,0,0] neg_hi:[1,0,0] // W32: v_wmma_i32_16x16x16_iu4 v[4:11], v[0:1], v[2:3], v[4:11] neg_lo:[1,0,0] neg_hi:[1,0,0] ; encoding: [0x04,0x41,0x45,0xcc,0x00,0x05,0x12,0x3c] diff --git a/llvm/test/MC/AMDGPU/gfx9-asm-err.s b/llvm/test/MC/AMDGPU/gfx9-asm-err.s index b483ec5..0fcf642 100644 --- a/llvm/test/MC/AMDGPU/gfx9-asm-err.s +++ b/llvm/test/MC/AMDGPU/gfx9-asm-err.s @@ -31,7 +31,7 @@ v_subrev_u16_e64 v5, v1, -4.0 // GFX9ERR: error: literal operands are not supported v_cvt_u32_f64 v5, v[0:1] quad_perm:[0,2,1,1] row_mask:0xf bank_mask:0xf -// GFX9ERR: error: invalid operand for instruction +// GFX9ERR: error: not a valid operand. global_load_lds_dword v[2:3], off // GFX9ERR: error: instruction not supported on this GPU diff --git a/llvm/test/MC/AMDGPU/gfx90a_asm_features.s b/llvm/test/MC/AMDGPU/gfx90a_asm_features.s index 026fa25..35c67c3 100644 --- a/llvm/test/MC/AMDGPU/gfx90a_asm_features.s +++ b/llvm/test/MC/AMDGPU/gfx90a_asm_features.s @@ -958,12 +958,12 @@ buffer_atomic_pk_add_f16 v0, v2, s[4:7], 0 idxen glc // GFX90A: global_atomic_add_f32 v0, v[0:1], v2, off glc ; encoding: [0x00,0x80,0x35,0xdd,0x00,0x02,0x7f,0x00] // GFX1010: error: instruction not supported on this GPU -// GFX908: error: operands are not valid for this GPU or mode +// GFX908: error: invalid operand for instruction global_atomic_add_f32 v0, v[0:1], v2, off glc // GFX90A: global_atomic_pk_add_f16 v0, v[0:1], v2, off glc ; encoding: [0x00,0x80,0x39,0xdd,0x00,0x02,0x7f,0x00] // GFX1010: error: instruction not supported on this GPU -// GFX908: error: operands are not valid for this GPU or mode +// GFX908: error: invalid operand for instruction global_atomic_pk_add_f16 v0, v[0:1], v2, off glc // GFX90A: global_atomic_add_f64 v[0:1], v[0:1], v[2:3], off glc ; encoding: [0x00,0x80,0x3d,0xdd,0x00,0x02,0x7f,0x00] @@ -991,7 +991,7 @@ flat_atomic_max_f64 v[0:1], v[0:1], v[2:3] glc flat_atomic_min_f64 v[0:1], v[0:1], v[2:3] glc // GFX90A: global_atomic_add_f32 v0, v[0:1], v2, off glc ; encoding: [0x00,0x80,0x35,0xdd,0x00,0x02,0x7f,0x00] -// GFX908: error: operands are not valid for this GPU or mode +// GFX908: error: invalid operand for instruction // GFX1010: error: instruction not supported on this GPU global_atomic_add_f32 v0, v[0:1], v2, off glc @@ -1008,7 +1008,7 @@ global_atomic_add_f32 v0, v2, s[0:1] // GFX1010: error: instruction not supported on this GPU global_atomic_add_f32 v1, v0, v2, s[0:1] glc ; encoding: [0x00,0x80,0x35,0xdd,0x00,0x02,0x00,0x01] -// GFX908: error: operands are not valid for this GPU or mode +// GFX908: error: invalid operand for instruction // GFX1010: error: instruction not supported on this GPU // GFX90A: global_atomic_pk_add_f16 v0, v[0:1], v2, off glc ; encoding: [0x00,0x80,0x39,0xdd,0x00,0x02,0x7f,0x00] global_atomic_pk_add_f16 v0, v[0:1], v2, off glc diff --git a/llvm/test/MC/AMDGPU/gfx90a_err.s b/llvm/test/MC/AMDGPU/gfx90a_err.s index 8ec7a0a..1c62c2e 100644 --- a/llvm/test/MC/AMDGPU/gfx90a_err.s +++ b/llvm/test/MC/AMDGPU/gfx90a_err.s @@ -181,7 +181,7 @@ ds_wrxchg2st64_rtn_b32 v[6:7], v1, a2, a3 offset0:127 // GFX90A: error: invalid register class: data and dst should be all VGPR or AGPR image_load v[0:4], v2, s[0:7] dmask:0xf unorm tfe -// GFX90A: error: operands are not valid for this GPU or mode +// GFX90A: error: invalid operand for instruction image_sample_lz v[0:3], v[0:1], s[4:11], s[16:19] dmask:0xf // GFX90A: error: instruction not supported on this GPU diff --git a/llvm/test/MC/AMDGPU/gfx940_err.s b/llvm/test/MC/AMDGPU/gfx940_err.s index 7846803..1890014 100644 --- a/llvm/test/MC/AMDGPU/gfx940_err.s +++ b/llvm/test/MC/AMDGPU/gfx940_err.s @@ -88,13 +88,13 @@ v_cvt_sr_fp8_f32 v1, v2, v3 clamp // GFX940: error: invalid operand for instruction v_cvt_sr_fp8_f32 v1, v2, v3 mul:2 -// GFX940: error: invalid operand for instruction +// GFX940: error: not a valid operand. v_cvt_pk_fp8_f32 v1, v2, v3 clamp // GFX940: error: invalid operand for instruction v_cvt_pk_fp8_f32 v1, v2, v3 mul:2 -// GFX940: error: invalid operand for instruction +// GFX940: error: not a valid operand. s_getreg_b32 s1, hwreg(HW_REG_FLAT_SCR_LO) // GFX940: error: specified hardware register is not supported on this GPU @@ -121,7 +121,7 @@ exp pos0 v3, v2, v1, v0 // GFX940: error: instruction not supported on this GPU global_load_dword v[2:3], off lds -// GFX940: error: operands are not valid for this GPU or mode +// GFX940: error: invalid operand for instruction scratch_load_dword v2, off lds -// GFX940: error: operands are not valid for this GPU or mode +// GFX940: error: invalid operand for instruction diff --git a/llvm/test/MC/AMDGPU/mimg-err.s b/llvm/test/MC/AMDGPU/mimg-err.s index 76c9f25..19f4e36 100644 --- a/llvm/test/MC/AMDGPU/mimg-err.s +++ b/llvm/test/MC/AMDGPU/mimg-err.s @@ -11,7 +11,7 @@ image_load v[4:6], v[237:240], s[28:35] dmask:0x7 tfe // NOGCN: error: image data size does not match dmask and tfe // NOGFX9: error: image data size does not match dmask, d16 and tfe -// NOGFX90A: error: operands are not valid for this GPU or mode +// NOGFX90A: error: invalid operand for instruction image_load v[4:5], v[237:240], s[28:35] dmask:0x7 // NOGCN: error: image data size does not match dmask and tfe @@ -31,7 +31,7 @@ image_store v[4:7], v[237:240], s[28:35] dmask:0xe image_load v4, v[237:240], s[28:35] tfe // NOGCN: error: image data size does not match dmask and tfe // NOGFX9: error: image data size does not match dmask, d16 and tfe -// NOGFX90A: error: operands are not valid for this GPU or mode +// NOGFX90A: error: invalid operand for instruction //===----------------------------------------------------------------------===// // Image Sample @@ -40,7 +40,7 @@ image_load v4, v[237:240], s[28:35] tfe image_sample v[193:195], v[237:240], s[28:35], s[4:7] dmask:0x7 tfe // NOGCN: error: image data size does not match dmask and tfe // NOGFX9: error: image data size does not match dmask, d16 and tfe -// NOGFX90A: error: operands are not valid for this GPU or mode +// NOGFX90A: error: invalid operand for instruction image_sample v[193:195], v[237:240], s[28:35], s[4:7] dmask:0x3 // NOGCN: error: image data size does not match dmask and tfe @@ -59,7 +59,7 @@ image_sample v[193:195], v[237:240], s[28:35], s[4:7] dmask:0xf image_atomic_add v252, v2, s[8:15] dmask:0x1 tfe // NOGCN: error: image data size does not match dmask and tfe // NOGFX9: error: image data size does not match dmask and tfe -// NOGFX90A: error: operands are not valid for this GPU or mode +// NOGFX90A: error: invalid operand for instruction image_atomic_add v[6:7], v255, s[8:15] dmask:0x2 // NOGCN: error: image data size does not match dmask and tfe @@ -74,7 +74,7 @@ image_atomic_add v[6:7], v255, s[8:15] dmask:0xf image_atomic_cmpswap v[4:7], v[192:195], s[28:35] dmask:0xf tfe // NOGCN: error: image data size does not match dmask and tfe // NOGFX9: error: image data size does not match dmask and tfe -// NOGFX90A: error: operands are not valid for this GPU or mode +// NOGFX90A: error: invalid operand for instruction image_atomic_add v252, v2, s[8:15] // NOGCN: error: invalid atomic image dmask @@ -84,12 +84,12 @@ image_atomic_add v252, v2, s[8:15] image_atomic_add v[6:7], v255, s[8:15] dmask:0x2 tfe // NOGCN: error: invalid atomic image dmask // NOGFX9: error: invalid atomic image dmask -// NOGFX90A: error: operands are not valid for this GPU or mode +// NOGFX90A: error: invalid operand for instruction image_atomic_cmpswap v[4:7], v[192:195], s[28:35] dmask:0xe tfe // NOGCN: error: invalid atomic image dmask // NOGFX9: error: invalid atomic image dmask -// NOGFX90A: error: operands are not valid for this GPU or mode +// NOGFX90A: error: invalid operand for instruction //===----------------------------------------------------------------------===// // Image Gather diff --git a/llvm/test/MC/AMDGPU/mtbuf.s b/llvm/test/MC/AMDGPU/mtbuf.s index cc87599..65db6e7 100644 --- a/llvm/test/MC/AMDGPU/mtbuf.s +++ b/llvm/test/MC/AMDGPU/mtbuf.s @@ -277,7 +277,7 @@ tbuffer_store_format_xyzw v[1:4], v[1:2], ttmp[4:7], s0, format:[BUF_DATA_FORMAT // Check addr64 tbuffer_store_format_xyzw v[1:4], v[1:2], ttmp[4:7], s0, format:[BUF_DATA_FORMAT_32,BUF_NUM_FORMAT_FLOAT] addr64 // SICI: tbuffer_store_format_xyzw v[1:4], v[1:2], ttmp[4:7], s0 format:[BUF_DATA_FORMAT_32,BUF_NUM_FORMAT_FLOAT] addr64 ; encoding: [0x00,0x80,0xa7,0xeb,0x01,0x01,0x1d,0x00] -// VI-ERR: error: operands are not valid for this GPU or mode +// VI-ERR: error: invalid operand for instruction //===----------------------------------------------------------------------===// // Tests for symbolic format errors handling diff --git a/llvm/test/MC/AMDGPU/mubuf.s b/llvm/test/MC/AMDGPU/mubuf.s index 3eabde1..f773fcd 100644 --- a/llvm/test/MC/AMDGPU/mubuf.s +++ b/llvm/test/MC/AMDGPU/mubuf.s @@ -172,35 +172,35 @@ buffer_load_dword v[1:2], v[2:3], ttmp[4:7], ttmp1 idxen offen offset:4 glc slc buffer_load_dword v1, v[2:3], s[4:7], s1 addr64 // SICI: buffer_load_dword v1, v[2:3], s[4:7], s1 addr64 ; encoding: [0x00,0x80,0x30,0xe0,0x02,0x01,0x01,0x01] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_load_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 // SICI: buffer_load_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 ; encoding: [0x04,0x80,0x30,0xe0,0x02,0x01,0x01,0x01] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_load_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 glc // SICI: buffer_load_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 glc ; encoding: [0x04,0xc0,0x30,0xe0,0x02,0x01,0x01,0x01] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_load_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 slc // SICI: buffer_load_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 slc ; encoding: [0x04,0x80,0x30,0xe0,0x02,0x01,0x41,0x01] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_load_dword v[1:2], v[2:3], s[4:7], s1 addr64 offset:4 tfe // SICI: buffer_load_dword v[1:2], v[2:3], s[4:7], s1 addr64 offset:4 tfe ; encoding: [0x04,0x80,0x30,0xe0,0x02,0x01,0x81,0x01] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_load_dword v[1:2], v[2:3], s[4:7], s1 addr64 glc tfe // SICI: buffer_load_dword v[1:2], v[2:3], s[4:7], s1 addr64 glc tfe ; encoding: [0x00,0xc0,0x30,0xe0,0x02,0x01,0x81,0x01] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_load_dword v[1:2], v[2:3], s[4:7], s1 addr64 offset:4 glc slc tfe // SICI: buffer_load_dword v[1:2], v[2:3], s[4:7], s1 addr64 offset:4 glc slc tfe ; encoding: [0x04,0xc0,0x30,0xe0,0x02,0x01,0xc1,0x01] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_load_dword v[1:2], v[2:3], ttmp[4:7], ttmp1 addr64 offset:4 glc slc tfe // SICI: buffer_load_dword v[1:2], v[2:3], ttmp[4:7], ttmp1 addr64 offset:4 glc slc tfe ; encoding: [0x04,0xc0,0x30,0xe0,0x02,0x01,0xdd,0x71] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction //===----------------------------------------------------------------------===// // store - immediate offset only @@ -288,19 +288,19 @@ buffer_store_dword v1, v[2:3], s[4:7], s1 idxen offen offset:4 slc buffer_store_dword v1, v[2:3], s[4:7], s1 addr64 // SICI: buffer_store_dword v1, v[2:3], s[4:7], s1 addr64 ; encoding: [0x00,0x80,0x70,0xe0,0x02,0x01,0x01,0x01] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_store_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 // SICI: buffer_store_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 ; encoding: [0x04,0x80,0x70,0xe0,0x02,0x01,0x01,0x01] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_store_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 glc // SICI: buffer_store_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 glc ; encoding: [0x04,0xc0,0x70,0xe0,0x02,0x01,0x01,0x01] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_store_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 slc // SICI: buffer_store_dword v1, v[2:3], s[4:7], s1 addr64 offset:4 slc ; encoding: [0x04,0x80,0x70,0xe0,0x02,0x01,0x41,0x01] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction //===----------------------------------------------------------------------===// // Instructions @@ -441,23 +441,23 @@ buffer_wbinvl1_vol //===----------------------------------------------------------------------===// buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 // SICI: buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 ; encoding: [0x00,0x80,0xf0,0xe0,0x02,0x01,0x02,0xb8] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_atomic_inc v1, v[2:3], s[8:11], s4 addr64 // SICI: buffer_atomic_inc v1, v[2:3], s[8:11], s4 addr64 ; encoding: [0x00,0x80,0xf0,0xe0,0x02,0x01,0x02,0x04] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 slc // SICI: buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 slc ; encoding: [0x00,0x80,0xf0,0xe0,0x02,0x01,0x42,0xb8] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 offset:4 // SICI: buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 offset:4 ; encoding: [0x04,0x80,0xf0,0xe0,0x02,0x01,0x02,0xb8] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 offset:4 slc // SICI: buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 offset:4 slc ; encoding: [0x04,0x80,0xf0,0xe0,0x02,0x01,0x42,0xb8] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_atomic_inc v1, off, s[8:11], 56 // SICI: buffer_atomic_inc v1, off, s[8:11], 56 ; encoding: [0x00,0x00,0xf0,0xe0,0x00,0x01,0x02,0xb8] @@ -541,23 +541,23 @@ buffer_atomic_inc v1, v[2:3], s[8:11], 56 idxen offen offset:4 slc buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 glc // SICI: buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 glc ; encoding: [0x00,0xc0,0xf0,0xe0,0x02,0x01,0x02,0xb8] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_atomic_inc v1, v[2:3], s[8:11], s4 addr64 glc // SICI: buffer_atomic_inc v1, v[2:3], s[8:11], s4 addr64 glc ; encoding: [0x00,0xc0,0xf0,0xe0,0x02,0x01,0x02,0x04] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 glc slc // SICI: buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 glc slc ; encoding: [0x00,0xc0,0xf0,0xe0,0x02,0x01,0x42,0xb8] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 offset:4 glc // SICI: buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 offset:4 glc ; encoding: [0x04,0xc0,0xf0,0xe0,0x02,0x01,0x02,0xb8] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 offset:4 glc slc // SICI: buffer_atomic_inc v1, v[2:3], s[8:11], 56 addr64 offset:4 glc slc ; encoding: [0x04,0xc0,0xf0,0xe0,0x02,0x01,0x42,0xb8] -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: invalid operand for instruction buffer_atomic_inc v1, off, s[8:11], 56 glc // SICI: buffer_atomic_inc v1, off, s[8:11], 56 glc ; encoding: [0x00,0x40,0xf0,0xe0,0x00,0x01,0x02,0xb8] diff --git a/llvm/test/MC/AMDGPU/smem.s b/llvm/test/MC/AMDGPU/smem.s index 2c6ae01..b0a71d7 100644 --- a/llvm/test/MC/AMDGPU/smem.s +++ b/llvm/test/MC/AMDGPU/smem.s @@ -671,8 +671,8 @@ s_atc_probe_buffer 0x1, s[8:11], 0x1FFFFF // NOVI: error: expected a 20-bit unsigned offset s_load_dword s1, s[2:3], s0 offset:0x1FFFFF -// NOSICI: error: operands are not valid for this GPU or mode -// NOVI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. +// NOVI: error: not a valid operand. // NOGFX9: error: expected a 21-bit signed offset // NOGFX10: error: expected a 21-bit signed offset @@ -682,8 +682,8 @@ s_store_dword s1, s[2:3], 0x1FFFFF // NOVI: error: expected a 20-bit unsigned offset s_buffer_load_dword s10, s[92:95], s0 offset:-1 -// NOSICI: error: operands are not valid for this GPU or mode -// NOVI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. +// NOVI: error: not a valid operand. // NOGFX9: error: expected a 20-bit unsigned offset // NOGFX10: error: expected a 20-bit unsigned offset diff --git a/llvm/test/MC/AMDGPU/vop3-errs.s b/llvm/test/MC/AMDGPU/vop3-errs.s index dcf9b26..15db8d5 100644 --- a/llvm/test/MC/AMDGPU/vop3-errs.s +++ b/llvm/test/MC/AMDGPU/vop3-errs.s @@ -13,10 +13,11 @@ v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3] // GFX67: error: instruction not supported on this GPU v_cmp_eq_f32_e64 vcc, v0, v1 mul:2 -// GCN: error: invalid operand for instruction +// GFX67: error: not a valid operand. +// GFX89: error: not a valid operand. v_cmp_le_f64_e64 vcc, v0, v1 mul:4 -// GCN: error: invalid operand for instruction +// GCN: error: not a valid operand. // // mul @@ -63,7 +64,7 @@ v_interp_p1ll_f16 v5, v2, attr31.x v0 v_interp_p2_f16 v5, v2, attr1.x, v3 mul:2 // GFX67: error: instruction not supported on this GPU -// GFX89: error: invalid operand for instruction +// GFX89: error: not a valid operand. // // v_div_scale_* diff --git a/llvm/test/MC/AMDGPU/vop3-gfx9.s b/llvm/test/MC/AMDGPU/vop3-gfx9.s index ac64fee..62ff34d 100644 --- a/llvm/test/MC/AMDGPU/vop3-gfx9.s +++ b/llvm/test/MC/AMDGPU/vop3-gfx9.s @@ -258,17 +258,17 @@ v_fma_f16 v5, v1, v2, v3 clamp v_fma_f16 v5, v1, v2, v3 op_sel:[1,0,0,0] // GFX9: v_fma_f16 v5, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x06,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_fma_f16 v5, v1, v2, v3 op_sel:[0,1,0,0] // GFX9: v_fma_f16 v5, v1, v2, v3 op_sel:[0,1,0,0] ; encoding: [0x05,0x10,0x06,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_fma_f16 v5, v1, v2, v3 op_sel:[1,1,1,1] // GFX9: v_fma_f16 v5, v1, v2, v3 op_sel:[1,1,1,1] ; encoding: [0x05,0x78,0x06,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_fma_legacy_f16_e64 v5, v1, v2, v3 // GFX9: v_fma_legacy_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x04] @@ -319,17 +319,17 @@ v_div_fixup_f16 v5, v1, v2, v3 clamp v_div_fixup_f16 v5, v1, v2, v3 op_sel:[1,0,0,0] // GFX9: v_div_fixup_f16 v5, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x07,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_div_fixup_f16 v5, v1, v2, v3 op_sel:[0,0,1,0] // GFX9: v_div_fixup_f16 v5, v1, v2, v3 op_sel:[0,0,1,0] ; encoding: [0x05,0x20,0x07,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_div_fixup_f16 v5, v1, v2, v3 op_sel:[0,0,0,1] // GFX9: v_div_fixup_f16 v5, v1, v2, v3 op_sel:[0,0,0,1] ; encoding: [0x05,0x40,0x07,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_div_fixup_legacy_f16_e64 v5, 0.5, v2, v3 // GFX9: v_div_fixup_legacy_f16 v5, 0.5, v2, v3 ; encoding: [0x05,0x00,0xef,0xd1,0xf0,0x04,0x0e,0x04] @@ -383,32 +383,32 @@ v_mad_f16 v5, v1, v2, |v3| v_mad_f16 v5, v1, v2, v3 op_sel:[0,0,0,0] // GFX9: v_mad_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0x03,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_mad_f16 v5, v1, v2, v3 op_sel:[1,0,0,0] // GFX9: v_mad_f16 v5, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x03,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_mad_f16 v5, v1, v2, v3 op_sel:[0,1,0,0] // GFX9: v_mad_f16 v5, v1, v2, v3 op_sel:[0,1,0,0] ; encoding: [0x05,0x10,0x03,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_mad_f16 v5, v1, v2, v3 op_sel:[0,0,1,0] // GFX9: v_mad_f16 v5, v1, v2, v3 op_sel:[0,0,1,0] ; encoding: [0x05,0x20,0x03,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_mad_f16 v5, v1, v2, v3 op_sel:[0,0,0,1] // GFX9: v_mad_f16 v5, v1, v2, v3 op_sel:[0,0,0,1] ; encoding: [0x05,0x40,0x03,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_mad_f16 v5, v1, v2, v3 op_sel:[1,1,1,1] // GFX9: v_mad_f16 v5, v1, v2, v3 op_sel:[1,1,1,1] ; encoding: [0x05,0x78,0x03,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_mad_f16 v5, v1, v2, v3 clamp // GFX9: v_mad_f16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0x03,0xd2,0x01,0x05,0x0e,0x04] @@ -438,12 +438,12 @@ v_mad_i16 v5, v1, v2, v3 clamp v_mad_i16 v5, v1, v2, v3 op_sel:[0,0,0,1] // GFX9: v_mad_i16 v5, v1, v2, v3 op_sel:[0,0,0,1] ; encoding: [0x05,0x40,0x05,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_mad_i16 v5, v1, v2, v3 op_sel:[1,1,1,1] // GFX9: v_mad_i16 v5, v1, v2, v3 op_sel:[1,1,1,1] ; encoding: [0x05,0x78,0x05,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_mad_legacy_f16_e64 v5, 0.5, v2, v3 // GFX9: v_mad_legacy_f16 v5, 0.5, v2, v3 ; encoding: [0x05,0x00,0xea,0xd1,0xf0,0x04,0x0e,0x04] @@ -524,17 +524,17 @@ v_mad_u16 v5, v1, v2, v3 clamp v_mad_u16 v5, v1, v2, v3 op_sel:[1,0,0,0] // GFX9: v_mad_u16 v5, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x04,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_mad_u16 v5, v1, v2, v3 op_sel:[0,0,0,1] // GFX9: v_mad_u16 v5, v1, v2, v3 op_sel:[0,0,0,1] ; encoding: [0x05,0x40,0x04,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_mad_u16 v5, v1, v2, v3 op_sel:[1,1,1,1] // GFX9: v_mad_u16 v5, v1, v2, v3 op_sel:[1,1,1,1] ; encoding: [0x05,0x78,0x04,0xd2,0x01,0x05,0x0e,0x04] // NOSICI: error: instruction not supported on this GPU -// NOVI: error: operands are not valid for this GPU or mode +// NOVI: error: not a valid operand. v_interp_p2_f16 v5, v2, attr0.x, v3 // GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 ; encoding: [0x05,0x00,0x77,0xd2,0x00,0x04,0x0e,0x04] diff --git a/llvm/test/MC/AMDGPU/vop_dpp.s b/llvm/test/MC/AMDGPU/vop_dpp.s index fa409fd..e8a479e 100644 --- a/llvm/test/MC/AMDGPU/vop_dpp.s +++ b/llvm/test/MC/AMDGPU/vop_dpp.s @@ -115,19 +115,19 @@ v_mov_b32 v0, v0 quad_perm:[1,3,0,1] bank_mask:0x1 bound_ctrl:0 // Check modifiers //===----------------------------------------------------------------------===// -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_add_f32_dpp v0, -v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x00,0x00,0x02,0x00,0x01,0x19,0xa1] v_add_f32 v0, -v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_add_f32_dpp v0, v0, |v0| row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x00,0x00,0x02,0x00,0x01,0x89,0xa1] v_add_f32 v0, v0, |v0| row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_add_f32_dpp v0, -v0, |v0| row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x00,0x00,0x02,0x00,0x01,0x99,0xa1] v_add_f32 v0, -v0, |v0| row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_add_f32_dpp v0, |v0|, -v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x00,0x00,0x02,0x00,0x01,0x69,0xa1] v_add_f32 v0, |v0|, -v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 @@ -139,15 +139,15 @@ v_add_f32 v0, |v0|, -v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // GCN: v_nop row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x00,0x00,0x7e,0x00,0x01,0x09,0xa1] v_nop row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_u32_f32_dpp v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x0e,0x00,0x7e,0x00,0x01,0x09,0xa1] v_cvt_u32_f32 v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_fract_f32_dpp v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x36,0x00,0x7e,0x00,0x01,0x09,0xa1] v_fract_f32 v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_sin_f32_dpp v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x52,0x00,0x7e,0x00,0x01,0x09,0xa1] v_sin_f32 v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 @@ -155,95 +155,95 @@ v_sin_f32 v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // VI9: v_mov_b32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x02,0x02,0x7e,0x00,0x01,0x09,0xa1] v_mov_b32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_f32_i32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x0a,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_f32_i32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_f32_u32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x0c,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_f32_u32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_i32_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x10,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_i32_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_f16_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x14,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_f16_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_f32_f16_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x16,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_f32_f16 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_rpi_i32_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x18,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_rpi_i32_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_flr_i32_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x1a,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_flr_i32_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_off_f32_i4_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x1c,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_off_f32_i4 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_f32_ubyte0_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x22,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_f32_ubyte0 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_f32_ubyte1_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x24,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_f32_ubyte1 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_f32_ubyte2_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x26,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_f32_ubyte2 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cvt_f32_ubyte3_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x28,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cvt_f32_ubyte3 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_trunc_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x38,0x02,0x7e,0x00,0x01,0x09,0xa1] v_trunc_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_ceil_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x3a,0x02,0x7e,0x00,0x01,0x09,0xa1] v_ceil_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_rndne_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x3c,0x02,0x7e,0x00,0x01,0x09,0xa1] v_rndne_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_floor_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x3e,0x02,0x7e,0x00,0x01,0x09,0xa1] v_floor_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_exp_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x40,0x02,0x7e,0x00,0x01,0x09,0xa1] v_exp_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_log_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x42,0x02,0x7e,0x00,0x01,0x09,0xa1] v_log_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_rcp_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x44,0x02,0x7e,0x00,0x01,0x09,0xa1] v_rcp_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_rcp_iflag_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x46,0x02,0x7e,0x00,0x01,0x09,0xa1] v_rcp_iflag_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_rsq_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x48,0x02,0x7e,0x00,0x01,0x09,0xa1] v_rsq_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_sqrt_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x4e,0x02,0x7e,0x00,0x01,0x09,0xa1] v_sqrt_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_cos_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x54,0x02,0x7e,0x00,0x01,0x09,0xa1] v_cos_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 @@ -267,22 +267,22 @@ v_ffbl_b32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // VI9: v_ffbh_i32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x5e,0x02,0x7e,0x00,0x01,0x09,0xa1] v_ffbh_i32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_frexp_exp_i32_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x66,0x02,0x7e,0x00,0x01,0x09,0xa1] v_frexp_exp_i32_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_frexp_mant_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x68,0x02,0x7e,0x00,0x01,0x09,0xa1] v_frexp_mant_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // VI9: v_log_legacy_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x98,0x02,0x7e,0x00,0x01,0x09,0xa1] // NOSI: error: instruction not supported on this GPU -// NOCI: error: operands are not valid for this GPU or mode +// NOCI: error: not a valid operand. v_log_legacy_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // VI9: v_exp_legacy_f32_dpp v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x96,0x02,0x7e,0x00,0x01,0x09,0xa1] // NOSI: error: instruction not supported on this GPU -// NOCI: error: operands are not valid for this GPU or mode +// NOCI: error: not a valid operand. v_exp_legacy_f32 v1, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // NOSICI: error: instruction not supported on this GPU @@ -382,23 +382,23 @@ v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask //===----------------------------------------------------------------------===// // ToDo: VOP2bInst instructions: v_add_u32, v_sub_u32 ... (vcc and ApplyMnemonic in AsmMatcherEmitter.cpp) -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_mac_f32_dpp v0, v0, v0 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x00,0x00,0x2c,0x00,0x01,0x01,0xff] v_mac_f32 v0, v0, v0 row_shl:1 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_mac_f32_dpp v0, v0, v0 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x00,0x00,0x2c,0x00,0x1f,0x01,0xff] v_mac_f32 v0, v0, v0 row_shr:0xf -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_mac_f32_dpp v0, v0, v0 quad_perm:[1,3,0,1] row_mask:0xa bank_mask:0xf bound_ctrl:1 ; encoding: [0xfa,0x00,0x00,0x2c,0x00,0x4d,0x08,0xaf] v_mac_f32 v0, v0, v0 quad_perm:[1,3,0,1] row_mask:0xa bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_add_f32_dpp v0, v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x00,0x00,0x02,0x00,0x01,0x09,0xa1] v_add_f32 v0, v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_min_f32_dpp v0, v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x00,0x00,0x14,0x00,0x01,0x09,0xa1] v_min_f32 v0, v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 @@ -406,19 +406,19 @@ v_min_f32 v0, v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // VI9: v_and_b32_dpp v0, v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x00,0x00,0x26,0x00,0x01,0x09,0xa1] v_and_b32 v0, v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_mul_i32_i24_dpp v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x0c,0x02,0x01,0x09,0xa1] v_mul_i32_i24 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_sub_f32_dpp v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x04,0x02,0x01,0x09,0xa1] v_sub_f32 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_subrev_f32_dpp v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x06,0x02,0x01,0x09,0xa1] v_subrev_f32 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_mul_f32_dpp v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x0a,0x02,0x01,0x09,0xa1] v_mul_f32 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 @@ -426,7 +426,7 @@ v_mul_f32 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // VI9: v_mul_hi_i32_i24_dpp v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x0e,0x02,0x01,0x09,0xa1] v_mul_hi_i32_i24 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_mul_u32_u24_dpp v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x10,0x02,0x01,0x09,0xa1] v_mul_u32_u24 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 @@ -434,7 +434,7 @@ v_mul_u32_u24 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // VI9: v_mul_hi_u32_u24_dpp v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x12,0x02,0x01,0x09,0xa1] v_mul_hi_u32_u24 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // VI9: v_max_f32_dpp v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x16,0x02,0x01,0x09,0xa1] v_max_f32 v1, v2 v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 @@ -551,46 +551,46 @@ v_min_i16 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 v_ldexp_f16 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // NOSICI: error: instruction not supported on this GPU -// NOGFX9: error: operands are not valid for this GPU or mode +// NOGFX9: error: not a valid operand. // VI: v_add_u32_dpp v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x32,0x02,0x01,0x09,0xa1] v_add_u32 v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // NOSICI: error: instruction not supported on this GPU -// NOGFX9: error: operands are not valid for this GPU or mode +// NOGFX9: error: not a valid operand. // VI: v_sub_u32_dpp v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x34,0x02,0x01,0x09,0xa1] v_sub_u32 v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // NOSICI: error: instruction not supported on this GPU -// NOGFX9: error: operands are not valid for this GPU or mode +// NOGFX9: error: not a valid operand. // VI: v_subrev_u32_dpp v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x36,0x02,0x01,0x09,0xa1] v_subrev_u32 v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // NOGFX9: error: instruction not supported on this GPU // VI: v_addc_u32_dpp v1, vcc, v2, v3, vcc row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x38,0x02,0x01,0x09,0xa1] v_addc_u32 v1, vcc, v2, v3, vcc row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // NOGFX9: error: instruction not supported on this GPU // VI: v_subb_u32_dpp v1, vcc, v2, v3, vcc row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x3a,0x02,0x01,0x09,0xa1] v_subb_u32 v1, vcc, v2, v3, vcc row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // NOGFX9: error: instruction not supported on this GPU // VI: v_subbrev_u32_dpp v1, vcc, v2, v3, vcc row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x3c,0x02,0x01,0x09,0xa1] v_subbrev_u32 v1, vcc, v2, v3, vcc row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // NOVI: error: instruction not supported on this GPU // GFX9: v_add_co_u32_dpp v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x32,0x02,0x01,0x09,0xa1] v_add_co_u32 v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // NOVI: error: instruction not supported on this GPU // GFX9: v_sub_co_u32_dpp v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x34,0x02,0x01,0x09,0xa1] v_sub_co_u32 v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: operands are not valid for this GPU or mode +// NOSICI: error: not a valid operand. // NOVI: error: instruction not supported on this GPU // GFX9: v_subrev_co_u32_dpp v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:1 ; encoding: [0xfa,0x06,0x02,0x36,0x02,0x01,0x09,0xa1] v_subrev_co_u32 v1, vcc, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 @@ -632,7 +632,7 @@ v_mov_b32 v0, 1 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // NOGFX9: error: invalid operand for instruction v_and_b32 v0, 42, v1 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: invalid operand for instruction +// NOSICI: error: not a valid operand. // NOVI: error: invalid operand for instruction // NOGFX9: error: invalid operand for instruction v_add_f32 v0, v1, 345 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 @@ -647,7 +647,7 @@ v_mov_b32 v0, s1 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 // NOGFX9: error: invalid operand for instruction v_and_b32 v0, s42, v1 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 -// NOSICI: error: invalid operand for instruction +// NOSICI: error: not a valid operand. // NOVI: error: invalid operand for instruction // NOGFX9: error: invalid operand for instruction v_add_f32 v0, v1, s45 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 diff --git a/llvm/test/MC/AMDGPU/vop_sdwa.s b/llvm/test/MC/AMDGPU/vop_sdwa.s index 5ebef20..e4faaba 100644 --- a/llvm/test/MC/AMDGPU/vop_sdwa.s +++ b/llvm/test/MC/AMDGPU/vop_sdwa.s @@ -11,31 +11,31 @@ // Check SDWA operands //---------------------------------------------------------------------------// -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_mov_b32_sdwa v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x02,0x7e,0x02,0x10,0x06,0x00] v_mov_b32 v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_mov_b32_sdwa v3, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PRESERVE src0_sel:WORD_1 ; encoding: [0xf9,0x02,0x06,0x7e,0x04,0x11,0x05,0x00] v_mov_b32 v3, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PRESERVE src0_sel:WORD_1 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_mov_b32_sdwa v15, v99 dst_sel:BYTE_2 dst_unused:UNUSED_SEXT src0_sel:WORD_0 ; encoding: [0xf9,0x02,0x1e,0x7e,0x63,0x0a,0x04,0x00] v_mov_b32 v15, v99 dst_sel:BYTE_2 dst_unused:UNUSED_SEXT src0_sel:WORD_0 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_min_u32_sdwa v194, v13, v1 dst_sel:BYTE_3 dst_unused:UNUSED_SEXT src0_sel:BYTE_3 src1_sel:BYTE_2 ; encoding: [0xf9,0x02,0x84,0x1d,0x0d,0x0b,0x03,0x02] v_min_u32 v194, v13, v1 dst_sel:BYTE_3 dst_unused:UNUSED_SEXT src0_sel:BYTE_3 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_min_u32_sdwa v255, v4, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:WORD_1 ; encoding: [0xf9,0x02,0xfe,0x1d,0x04,0x04,0x02,0x05] v_min_u32 v255, v4, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:WORD_1 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_min_u32_sdwa v200, v200, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD ; encoding: [0xf9,0x02,0x90,0x1d,0xc8,0x05,0x01,0x06] v_min_u32 v200, v200, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_min_u32_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; encoding: [0xf9,0x02,0x02,0x1c,0x01,0x06,0x00,0x06] v_min_u32 v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD @@ -43,43 +43,43 @@ v_min_u32 v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_se // Check optional operands //---------------------------------------------------------------------------// -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_u32_f32_sdwa v0, v0 clamp dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x0e,0x00,0x7e,0x00,0x36,0x06,0x00] v_cvt_u32_f32 v0, v0 clamp dst_sel:DWORD -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_fract_f32_sdwa v0, v0 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x36,0x00,0x7e,0x00,0x26,0x06,0x00] v_fract_f32 v0, v0 clamp dst_sel:DWORD dst_unused:UNUSED_PAD -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_sin_f32_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x52,0x00,0x7e,0x00,0x06,0x05,0x00] v_sin_f32 v0, v0 dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_mov_b32_sdwa v1, v0 clamp dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:WORD_1 ; encoding: [0xf9,0x02,0x02,0x7e,0x00,0x36,0x05,0x00] v_mov_b32 v1, v0 clamp src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_trunc_f32_sdwa v1, v0 clamp dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:WORD_1 ; encoding: [0xf9,0x38,0x02,0x7e,0x00,0x36,0x05,0x00] v_trunc_f32 v1, v0 clamp dst_sel:DWORD src0_sel:WORD_1 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // GFX89: v_mov_b32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x02,0x7e,0x00,0x16,0x06,0x00] v_mov_b32_sdwa v1, v0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // GFX89: v_add_f32_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; encoding: [0xf9,0x00,0x00,0x02,0x00,0x06,0x05,0x06] v_add_f32_sdwa v0, v0, v0 dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_min_f32_sdwa v0, v0, v0 clamp dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:BYTE_2 ; encoding: [0xf9,0x00,0x00,0x14,0x00,0x36,0x06,0x02] v_min_f32 v0, v0, v0 clamp dst_sel:DWORD src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_and_b32_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; encoding: [0xf9,0x00,0x00,0x26,0x00,0x06,0x06,0x02] v_and_b32 v0, v0, v0 dst_unused:UNUSED_PAD src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // GFX89: v_mul_i32_i24_sdwa v1, v2, v3 clamp dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x06,0x02,0x0c,0x02,0x36,0x06,0x06] v_mul_i32_i24_sdwa v1, v2, v3 clamp @@ -87,31 +87,31 @@ v_mul_i32_i24_sdwa v1, v2, v3 clamp // Check modifiers //===----------------------------------------------------------------------===// -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_fract_f32_sdwa v0, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x36,0x00,0x7e,0x00,0x06,0x25,0x00] v_fract_f32 v0, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_sin_f32_sdwa v0, -|v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x52,0x00,0x7e,0x00,0x06,0x35,0x00] v_sin_f32 v0, -abs(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_add_f32_sdwa v0, -|v0|, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x00,0x00,0x02,0x00,0x06,0x35,0x12] v_add_f32 v0, -|v0|, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_min_f32_sdwa v0, |v0|, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x00,0x00,0x14,0x00,0x06,0x25,0x12] v_min_f32 v0, abs(v0), -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // GFX89: v_mov_b32_sdwa v1, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x02,0x7e,0x00,0x16,0x0e,0x00] v_mov_b32_sdwa v1, sext(v0) -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_and_b32_sdwa v0, sext(v0), sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; encoding: [0xf9,0x00,0x00,0x26,0x00,0x06,0x0e,0x0a] v_and_b32 v0, sext(v0), sext(v0) dst_unused:UNUSED_PAD src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmp_class_f32 vcc, -v1, sext(v2) src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x12,0x0c] // GFX9: v_cmp_class_f32_sdwa vcc, -v1, sext(v2) src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x12,0x0c] v_cmp_class_f32_sdwa vcc, -v1, sext(v2) src0_sel:BYTE_2 src1_sel:WORD_0 @@ -120,250 +120,250 @@ v_cmp_class_f32_sdwa vcc, -v1, sext(v2) src0_sel:BYTE_2 src1_sel:WORD_0 // Check VOP1 opcodes //===----------------------------------------------------------------------===// -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // GFX89: v_nop ; encoding: [0xf9,0x00,0x00,0x7e,0x00,0x00,0x00,0x00] v_nop_sdwa -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_u32_f32_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x0e,0x00,0x7e,0x00,0x06,0x05,0x00] v_cvt_u32_f32 v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_fract_f32_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x36,0x00,0x7e,0x00,0x06,0x05,0x00] v_fract_f32 v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_sin_f32_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x52,0x00,0x7e,0x00,0x06,0x05,0x00] v_sin_f32 v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_mov_b32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x02,0x02,0x7e,0x00,0x06,0x05,0x00] v_mov_b32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_f32_i32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x0a,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_f32_i32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_f32_u32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x0c,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_f32_u32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_i32_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x10,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_i32_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_f16_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x14,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_f16_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_f32_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x16,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_f32_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_rpi_i32_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x18,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_rpi_i32_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_flr_i32_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x1a,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_flr_i32_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_off_f32_i4_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x1c,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_off_f32_i4 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_f32_ubyte0_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x22,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_f32_ubyte0 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_f32_ubyte1_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x24,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_f32_ubyte1 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_f32_ubyte2_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x26,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_f32_ubyte2 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cvt_f32_ubyte3_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x28,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_f32_ubyte3 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_trunc_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x38,0x02,0x7e,0x00,0x06,0x05,0x00] v_trunc_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_ceil_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x3a,0x02,0x7e,0x00,0x06,0x05,0x00] v_ceil_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_rndne_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x3c,0x02,0x7e,0x00,0x06,0x05,0x00] v_rndne_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_floor_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x3e,0x02,0x7e,0x00,0x06,0x05,0x00] v_floor_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_exp_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x40,0x02,0x7e,0x00,0x06,0x05,0x00] v_exp_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_log_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x42,0x02,0x7e,0x00,0x06,0x05,0x00] v_log_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_rcp_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x44,0x02,0x7e,0x00,0x06,0x05,0x00] v_rcp_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_rcp_iflag_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x46,0x02,0x7e,0x00,0x06,0x05,0x00] v_rcp_iflag_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_rsq_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x48,0x02,0x7e,0x00,0x06,0x05,0x00] v_rsq_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_sqrt_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x4e,0x02,0x7e,0x00,0x06,0x05,0x00] v_sqrt_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_cos_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x54,0x02,0x7e,0x00,0x06,0x05,0x00] v_cos_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_not_b32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x56,0x02,0x7e,0x00,0x06,0x05,0x00] v_not_b32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_bfrev_b32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x58,0x02,0x7e,0x00,0x06,0x05,0x00] v_bfrev_b32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_ffbh_u32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x5a,0x02,0x7e,0x00,0x06,0x05,0x00] v_ffbh_u32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_ffbl_b32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x5c,0x02,0x7e,0x00,0x06,0x05,0x00] v_ffbl_b32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_ffbh_i32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x5e,0x02,0x7e,0x00,0x06,0x05,0x00] v_ffbh_i32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_frexp_exp_i32_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x66,0x02,0x7e,0x00,0x06,0x05,0x00] v_frexp_exp_i32_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_frexp_mant_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x68,0x02,0x7e,0x00,0x06,0x05,0x00] v_frexp_mant_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 // GFX89: v_log_legacy_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x98,0x02,0x7e,0x00,0x06,0x05,0x00] // NOSI: error: instruction not supported on this GPU -// NOCI: error: invalid operand for instruction +// NOCI: error: not a valid operand. v_log_legacy_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 // GFX89: v_exp_legacy_f32_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x96,0x02,0x7e,0x00,0x06,0x05,0x00] // NOSI: error: instruction not supported on this GPU -// NOCI: error: invalid operand for instruction +// NOCI: error: not a valid operand. v_exp_legacy_f32 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_cvt_f16_u16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x72,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_f16_u16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_cvt_f16_i16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x74,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_f16_i16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_cvt_u16_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x76,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_u16_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_cvt_i16_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x78,0x02,0x7e,0x00,0x06,0x05,0x00] v_cvt_i16_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_rcp_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x7a,0x02,0x7e,0x00,0x06,0x05,0x00] v_rcp_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_sqrt_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x7c,0x02,0x7e,0x00,0x06,0x05,0x00] v_sqrt_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_rsq_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x7e,0x02,0x7e,0x00,0x06,0x05,0x00] v_rsq_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_log_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x80,0x02,0x7e,0x00,0x06,0x05,0x00] v_log_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_exp_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x82,0x02,0x7e,0x00,0x06,0x05,0x00] v_exp_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_frexp_mant_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x84,0x02,0x7e,0x00,0x06,0x05,0x00] v_frexp_mant_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_frexp_exp_i16_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x86,0x02,0x7e,0x00,0x06,0x05,0x00] v_frexp_exp_i16_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_floor_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x88,0x02,0x7e,0x00,0x06,0x05,0x00] v_floor_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_ceil_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x8a,0x02,0x7e,0x00,0x06,0x05,0x00] v_ceil_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_trunc_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x8c,0x02,0x7e,0x00,0x06,0x05,0x00] v_trunc_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_rndne_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x8e,0x02,0x7e,0x00,0x06,0x05,0x00] v_rndne_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_fract_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x90,0x02,0x7e,0x00,0x06,0x05,0x00] v_fract_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_sin_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x92,0x02,0x7e,0x00,0x06,0x05,0x00] v_sin_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_cos_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x94,0x02,0x7e,0x00,0x06,0x05,0x00] v_cos_f16 v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 // GFX9: v_cvt_norm_i16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x16,0x00] -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: instruction not supported on this GPU v_cvt_norm_i16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD // GFX9: v_cvt_norm_i16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x26,0x00] -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: instruction not supported on this GPU v_cvt_norm_i16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD // GFX9: v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x9c,0x0a,0x7e,0x01,0x16,0x06,0x00] -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: instruction not supported on this GPU v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD // GFX9: v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x05,0x00] -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: instruction not supported on this GPU v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 // GFX9: v_sat_pk_u8_i16_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x0e,0x00] -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: instruction not supported on this GPU v_sat_pk_u8_i16_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD @@ -371,237 +371,237 @@ v_sat_pk_u8_i16_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:D // Check VOP2 opcodes //===----------------------------------------------------------------------===// -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_add_f32_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x00,0x00,0x02,0x00,0x06,0x05,0x02] v_add_f32 v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_min_f32_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x00,0x00,0x14,0x00,0x06,0x05,0x02] v_min_f32 v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_and_b32_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x00,0x00,0x26,0x00,0x06,0x05,0x02] v_and_b32 v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_mul_i32_i24_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x0c,0x02,0x06,0x05,0x02] v_mul_i32_i24 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_sub_f32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x04,0x02,0x06,0x05,0x02] v_sub_f32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_subrev_f32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x06,0x02,0x06,0x05,0x02] v_subrev_f32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_mul_f32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x0a,0x02,0x06,0x05,0x02] v_mul_f32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_mul_hi_i32_i24_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x0e,0x02,0x06,0x05,0x02] v_mul_hi_i32_i24 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_mul_u32_u24_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x10,0x02,0x06,0x05,0x02] v_mul_u32_u24 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_mul_hi_u32_u24_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x12,0x02,0x06,0x05,0x02] v_mul_hi_u32_u24 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_max_f32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x16,0x02,0x06,0x05,0x02] v_max_f32 v1, v2 v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_min_i32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x18,0x02,0x06,0x05,0x02] v_min_i32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_max_i32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x1a,0x02,0x06,0x05,0x02] v_max_i32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_min_u32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x1c,0x02,0x06,0x05,0x02] v_min_u32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_max_u32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x1e,0x02,0x06,0x05,0x02] v_max_u32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_lshrrev_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x20,0x02,0x06,0x05,0x02] v_lshrrev_b32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_ashrrev_i32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x22,0x02,0x06,0x05,0x02] v_ashrrev_i32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_lshlrev_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x24,0x02,0x06,0x05,0x02] v_lshlrev_b32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x28,0x02,0x06,0x05,0x02] v_or_b32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // GFX89: v_xor_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x2a,0x02,0x06,0x05,0x02] v_xor_b32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_add_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x3e,0x02,0x06,0x05,0x02] v_add_f16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_sub_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x40,0x02,0x06,0x05,0x02] v_sub_f16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_subrev_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x42,0x02,0x06,0x05,0x02] v_subrev_f16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_mul_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x44,0x02,0x06,0x05,0x02] v_mul_f16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_add_u16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x4c,0x02,0x06,0x05,0x02] v_add_u16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_sub_u16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x4e,0x02,0x06,0x05,0x02] v_sub_u16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_subrev_u16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x50,0x02,0x06,0x05,0x02] v_subrev_u16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_mul_lo_u16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x52,0x02,0x06,0x05,0x02] v_mul_lo_u16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_lshlrev_b16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x54,0x02,0x06,0x05,0x02] v_lshlrev_b16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_lshrrev_b16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x56,0x02,0x06,0x05,0x02] v_lshrrev_b16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_ashrrev_i16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x58,0x02,0x06,0x05,0x02] v_ashrrev_i16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_max_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x5a,0x02,0x06,0x05,0x02] v_max_f16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_min_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x5c,0x02,0x06,0x05,0x02] v_min_f16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_max_u16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x5e,0x02,0x06,0x05,0x02] v_max_u16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_max_i16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x60,0x02,0x06,0x05,0x02] v_max_i16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_min_u16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x62,0x02,0x06,0x05,0x02] v_min_u16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_min_i16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x64,0x02,0x06,0x05,0x02] v_min_i16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // GFX89: v_ldexp_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x66,0x02,0x06,0x05,0x02] v_ldexp_f16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOGFX9: error: operands are not valid for this GPU or mode // VI: v_add_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x32,0x02,0x06,0x05,0x02] v_add_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOGFX9: error: operands are not valid for this GPU or mode // VI: v_sub_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x34,0x02,0x06,0x05,0x02] v_sub_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOGFX9: error: operands are not valid for this GPU or mode // VI: v_subrev_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x36,0x02,0x06,0x05,0x02] v_subrev_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOGFX9: error: instruction not supported on this GPU // VI: v_addc_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x38,0x02,0x06,0x05,0x02] v_addc_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOGFX9: error: instruction not supported on this GPU // VI: v_subb_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x3a,0x02,0x06,0x05,0x02] v_subb_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOGFX9: error: instruction not supported on this GPU // VI: v_subbrev_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x3c,0x02,0x06,0x05,0x02] v_subbrev_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: instruction not supported on this GPU // GFX9: v_add_co_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x32,0x02,0x06,0x05,0x02] v_add_co_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: instruction not supported on this GPU // GFX9: v_sub_co_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x34,0x02,0x06,0x05,0x02] v_sub_co_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: instruction not supported on this GPU // GFX9: v_subrev_co_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x36,0x02,0x06,0x05,0x02] v_subrev_co_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: instruction not supported on this GPU // GFX9: v_addc_co_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x38,0x02,0x06,0x05,0x02] v_addc_co_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: instruction not supported on this GPU // GFX9: v_subb_co_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x3a,0x02,0x06,0x05,0x02] v_subb_co_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: instruction not supported on this GPU // GFX9: v_subbrev_co_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x3c,0x02,0x06,0x05,0x02] v_subbrev_co_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // GFX89: v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x00,0x01,0x00,0x06,0x06] v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cndmask_b32_sdwa v5, -1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x00,0xc1,0x06,0x86,0x06] v_cndmask_b32_sdwa v5, -1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // GFX89: v_cndmask_b32_sdwa v5, -v1, |v2|, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x16,0x26] v_cndmask_b32_sdwa v5, -v1, |v2|, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // GFX89: v_cndmask_b32_sdwa v5, |v1|, -v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x26,0x16] v_cndmask_b32_sdwa v5, |v1|, -v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD v_cndmask_b32_sdwa v5, vcc_lo, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE-1]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // NOGFX9: error: invalid operand (violates constant bus restrictions) @@ -609,72 +609,72 @@ v_cndmask_b32_sdwa v5, vcc_lo, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE // Check VOPC opcodes //===----------------------------------------------------------------------===// -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmp_eq_f32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x02,0x04] // GFX9: v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x02,0x04] v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmp_nle_f32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x98,0x7c,0x01,0x00,0x02,0x04] // GFX9: v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x98,0x7c,0x01,0x00,0x02,0x04] v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmpx_gt_f32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xa8,0x7c,0x01,0x00,0x02,0x04] // GFX9: v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xa8,0x7c,0x01,0x00,0x02,0x04] v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmpx_nlt_f32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xbc,0x7c,0x01,0x00,0x02,0x04] // GFX9: v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xbc,0x7c,0x01,0x00,0x02,0x04] v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmp_lt_i32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x82,0x7d,0x01,0x00,0x02,0x04] // GFX9: v_cmp_lt_i32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x82,0x7d,0x01,0x00,0x02,0x04] v_cmp_lt_i32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmp_t_i32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x8e,0x7d,0x01,0x00,0x02,0x04] // GFX9: v_cmp_t_i32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x8e,0x7d,0x01,0x00,0x02,0x04] v_cmp_t_i32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmpx_eq_i32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xa4,0x7d,0x01,0x00,0x02,0x04] // GFX9: v_cmpx_eq_i32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xa4,0x7d,0x01,0x00,0x02,0x04] v_cmpx_eq_i32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmpx_ne_i32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xaa,0x7d,0x01,0x00,0x02,0x04] // GFX9: v_cmpx_ne_i32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xaa,0x7d,0x01,0x00,0x02,0x04] v_cmpx_ne_i32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmp_f_u32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x90,0x7d,0x01,0x00,0x02,0x04] // GFX9: v_cmp_f_u32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x90,0x7d,0x01,0x00,0x02,0x04] v_cmp_f_u32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmp_gt_u32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x98,0x7d,0x01,0x00,0x02,0x04] // GFX9: v_cmp_gt_u32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x98,0x7d,0x01,0x00,0x02,0x04] v_cmp_gt_u32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmpx_le_u32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xb6,0x7d,0x01,0x00,0x02,0x04] // GFX9: v_cmpx_le_u32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xb6,0x7d,0x01,0x00,0x02,0x04] v_cmpx_le_u32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmpx_ne_u32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xba,0x7d,0x01,0x00,0x02,0x04] // GFX9: v_cmpx_ne_u32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0xba,0x7d,0x01,0x00,0x02,0x04] v_cmpx_ne_u32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmp_class_f32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x02,0x04] // GFX9: v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x02,0x04] v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // VI: v_cmpx_class_f32 vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x02,0x04] // GFX9: v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x02,0x04] v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 @@ -687,101 +687,101 @@ v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 // v_mac_f16/f32 is prohibited //===----------------------------------------------------------------------===// -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // VI: v_mac_f32_sdwa v3, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:WORD_1 src1_sel:DWORD ; encoding: [0xf9,0x0a,0x06,0x2c,0x04,0x16,0x05,0x06] -// NOGFX9: error: operands are not valid for this GPU or mode +// NOGFX9: error: not a valid operand. v_mac_f32 v3, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:WORD_1 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // VI: v_mac_f32_sdwa v15, v99, v194 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:WORD_0 src1_sel:DWORD ; encoding: [0xf9,0x84,0x1f,0x2c,0x63,0x0e,0x04,0x06] -// NOGFX9: error: operands are not valid for this GPU or mode +// NOGFX9: error: not a valid operand. v_mac_f32 v15, v99, v194 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:WORD_0 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // NOVI: error: invalid operand for instruction -// NOGFX9: error: operands are not valid for this GPU or mode +// NOGFX9: error: not a valid operand. v_mac_f32 v194, v13, v1 dst_sel:BYTE_0 dst_unused:UNUSED_SEXT src0_sel:BYTE_3 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // VI: v_mac_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x46,0x02,0x06,0x05,0x02] -// NOGFX9: error: operands are not valid for this GPU or mode +// NOGFX9: error: not a valid operand. v_mac_f16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 //===----------------------------------------------------------------------===// // Scalar registers are allowed //===----------------------------------------------------------------------===// -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // NOVI: error: invalid operand for instruction // GFX9: v_mov_b32_sdwa v1, s2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x02,0x7e,0x02,0x10,0x86,0x00] v_mov_b32 v1, s2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // NOVI: error: invalid operand for instruction // GFX9: v_mov_b32_sdwa v1, exec_lo dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x02,0x7e,0x7e,0x10,0x86,0x00] v_mov_b32 v1, exec_lo dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: register not available on this GPU // GFX9: v_mov_b32_sdwa v1, ttmp12 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x02,0x7e,0x78,0x10,0x86,0x00] v_mov_b32_sdwa v1, ttmp12 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v0, s0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x00,0x00,0x02,0x00,0x06,0x85,0x02] v_add_f32 v0, s0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v0, v0, s22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x2c,0x00,0x02,0x00,0x06,0x05,0x82] v_add_f32 v0, v0, s22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // NOVI: error: invalid operand for instruction // NOGFX9: error: invalid operand for instruction v_add_f32 v0, exec_lo, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // NOVI: error: invalid operand for instruction // NOGFX9: error: register not available on this GPU v_add_f32 v0, v1, tba_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // NOVI: error: invalid operand for instruction // NOGFX9: error: register not available on this GPU v_add_f32 v0, v1, tma_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cmp_eq_f32_sdwa vcc, s1, v2 src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x85,0x02] v_cmp_eq_f32_sdwa vcc, s1, v2 src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cmp_eq_f32_sdwa vcc, v1, s22 src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x2c,0x84,0x7c,0x01,0x00,0x05,0x82] v_cmp_eq_f32_sdwa vcc, v1, s22 src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: register not available on this GPU // GFX9: v_cmp_eq_f32_sdwa ttmp[12:13], v1, v2 src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x04,0x84,0x7c,0x01,0xf8,0x05,0x02] v_cmp_eq_f32_sdwa ttmp[12:13], v1, v2 src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: operands are not valid for this GPU or mode // NOGFX9: error: register not available on this GPU v_cmp_eq_f32_sdwa tba, v1, v2 src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: operands are not valid for this GPU or mode // NOGFX9: error: register not available on this GPU v_cmp_eq_f32_sdwa tma, v1, v2 src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: register not available on this GPU // GFX9: v_cmp_eq_f32_sdwa vcc, v1, ttmp15 src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0xf6,0x84,0x7c,0x01,0x00,0x05,0x82] v_cmp_eq_f32_sdwa vcc, v1, ttmp15 src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // NOGFX9: error: invalid operand (violates constant bus restrictions) v_cmp_eq_f32_sdwa vcc, exec_lo, vcc_lo src0_sel:WORD_1 src1_sel:BYTE_2 @@ -796,227 +796,227 @@ v_ceil_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel // Inline constants are allowed (though semantics is not clear yet) //===----------------------------------------------------------------------===// -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_mov_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0x80,0x06,0x86,0x00] v_mov_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_mov_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xc1,0x06,0x86,0x00] v_mov_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_mov_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xf0,0x06,0x86,0x00] v_mov_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_mov_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xf7,0x06,0x86,0x00] v_mov_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_mov_b32_sdwa v5, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xc1,0x16,0x8e,0x00] v_mov_b32_sdwa v5, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xc1,0x06,0x86,0x06] v_add_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, |-1|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xc1,0x16,0xa6,0x06] v_add_f32_sdwa v5, |-1|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, neg(-1), -|v2| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xc1,0x16,0x96,0x36] v_add_f32_sdwa v5, neg(-1), -|v2| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, -|-1|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xc1,0x16,0xb6,0x06] v_add_f32_sdwa v5, -|-1|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf0,0x06,0x86,0x06] v_add_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, |-4.0|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf7,0x16,0xa6,0x06] v_add_f32_sdwa v5, |-4.0|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, neg(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf7,0x16,0x96,0x06] v_add_f32_sdwa v5, neg(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, -|-4.0|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf7,0x16,0xb6,0x06] v_add_f32_sdwa v5, -|-4.0|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, v2, -4.0 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xee,0x0b,0x02,0x02,0x16,0x06,0x86] v_add_f32_sdwa v5, v2, -4.0 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, v2, |-4.0| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xee,0x0b,0x02,0x02,0x16,0x06,0xa6] v_add_f32_sdwa v5, v2, |-4.0| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, v2, neg(-4.0) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xee,0x0b,0x02,0x02,0x16,0x06,0x96] v_add_f32_sdwa v5, v2, neg(-4.0) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, v2, -|-4.0| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xee,0x0b,0x02,0x02,0x16,0x06,0xb6] v_add_f32_sdwa v5, v2, -|-4.0| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0x86] v_add_f32_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, v2, |-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0xa6] v_add_f32_sdwa v5, v2, |-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, v2, neg(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0x96] v_add_f32_sdwa v5, v2, neg(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_add_f32_sdwa v5, v2, -|-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0xb6] v_add_f32_sdwa v5, v2, -|-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_and_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x26,0xf7,0x16,0x86,0x06] v_and_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_and_b32_sdwa v5, sext(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x26,0xf7,0x16,0x8e,0x06] v_and_b32_sdwa v5, sext(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_and_b32_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x26,0x02,0x16,0x06,0x86] v_and_b32_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_and_b32_sdwa v5, v2, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x26,0x02,0x16,0x06,0x8e] v_and_b32_sdwa v5, v2, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // GFX9: v_exp_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0x86,0x00] v_exp_f16_sdwa v5, -1 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // GFX9: v_exp_f16_sdwa v5, |-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0xa6,0x00] v_exp_f16_sdwa v5, |-1| -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // GFX9: v_exp_f16_sdwa v5, neg(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0x96,0x00] v_exp_f16_sdwa v5, neg(-1) -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // GFX9: v_exp_f16_sdwa v5, -|-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0xb6,0x00] v_exp_f16_sdwa v5, -|-1| -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // GFX9: v_exp_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0x86,0x00] v_exp_f16_sdwa v5, 0.5 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // GFX9: v_exp_f16_sdwa v5, |0.5| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0xa6,0x00] v_exp_f16_sdwa v5, |0.5| -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // GFX9: v_exp_f16_sdwa v5, neg(0.5) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0x96,0x00] v_exp_f16_sdwa v5, neg(0.5) -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // GFX9: v_exp_f16_sdwa v5, -|0.5| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0xb6,0x00] v_exp_f16_sdwa v5, -|0.5| -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // NOGFX9: error: invalid operand for instruction v_max_i16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // NOGFX9: error: invalid operand for instruction v_max_i16_sdwa v5, sext(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // GFX9: v_max_i16_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x60,0x02,0x16,0x06,0x86] v_max_i16_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: invalid operand for instruction // GFX9: v_max_i16_sdwa v5, v2, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x60,0x02,0x16,0x06,0x8e] v_max_i16_sdwa v5, v2, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cmp_eq_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0x86,0x06] v_cmp_eq_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cmp_eq_f32_sdwa s[6:7], |-4.0|, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0xa6,0x06] v_cmp_eq_f32_sdwa s[6:7], |-4.0|, v2 src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cmp_eq_f32_sdwa s[6:7], neg(-4.0), v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0x96,0x06] v_cmp_eq_f32_sdwa s[6:7], neg(-4.0), v2 src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cmp_eq_f32_sdwa s[6:7], -|-4.0|, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0xb6,0x06] v_cmp_eq_f32_sdwa s[6:7], -|-4.0|, v2 src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, -1 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0x86] v_cmp_eq_f32_sdwa s[6:7], v2, -1 src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, |-1| src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0xa6] v_cmp_eq_f32_sdwa s[6:7], v2, |-1| src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, neg(-1) src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0x96] v_cmp_eq_f32_sdwa s[6:7], v2, neg(-1) src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, -|-1| src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0xb6] v_cmp_eq_f32_sdwa s[6:7], v2, -|-1| src0_sel:DWORD src1_sel:DWORD @@ -1025,19 +1025,19 @@ v_cmp_eq_f32_sdwa s[6:7], v2, -|-1| src0_sel:DWORD src1_sel:DWORD // Literals are not allowed //===----------------------------------------------------------------------===// -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // NOGFX89: error: invalid operand for instruction v_add_f32 v0, v1, 3.45 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // NOGFX89: error: invalid operand for instruction v_cmpx_class_f32 vcc, v1, 200 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: not a valid operand. +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // NOGFX89: error: invalid operand for instruction v_cmpx_class_f32 vcc, 200, v1 src0_sel:BYTE_2 src1_sel:WORD_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOGFX89: error: invalid operand for instruction v_mov_b32_sdwa v5, -17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD @@ -1045,17 +1045,17 @@ v_mov_b32_sdwa v5, -17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD // VOPC with arbitrary SGPR destination //===----------------------------------------------------------------------===// -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: operands are not valid for this GPU or mode // GFX9: v_cmp_eq_f32_sdwa s[2:3], v1, v2 src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x04,0x84,0x7c,0x01,0x82,0x05,0x02] v_cmp_eq_f32_sdwa s[2:3], v1, v2 src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: operands are not valid for this GPU or mode // GFX9: v_cmp_eq_f32_sdwa exec, v1, v2 src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x04,0x84,0x7c,0x01,0xfe,0x05,0x02] v_cmp_eq_f32_sdwa exec, v1, v2 src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOVI: error: invalid operand for instruction // GFX9: v_cmp_eq_f32_sdwa exec, s2, v2 src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x04,0x84,0x7c,0x02,0xfe,0x85,0x02] v_cmp_eq_f32_sdwa exec, s2, v2 src0_sel:WORD_1 src1_sel:BYTE_2 @@ -1064,23 +1064,23 @@ v_cmp_eq_f32_sdwa exec, s2, v2 src0_sel:WORD_1 src1_sel:BYTE_2 // OMod output modifier allowed //===----------------------------------------------------------------------===// -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // NOVI: error: operands are not valid for this GPU or mode // GFX9: v_trunc_f32_sdwa v1, v2 mul:2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x38,0x02,0x7e,0x02,0x50,0x06,0x00] v_trunc_f32 v1, v2 mul:2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD -// NOSICI: error: invalid operand for instruction -// NOVI: error: operands are not valid for this GPU or mode +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. +// NOVI: error: not a valid operand. // GFX9: v_trunc_f32_sdwa v1, v2 clamp div:2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x38,0x02,0x7e,0x02,0xf0,0x06,0x00] v_trunc_f32 v1, v2 clamp div:2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. // NOVI: error: operands are not valid for this GPU or mode // GFX9: v_add_f32_sdwa v0, v0, v0 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x00,0x00,0x02,0x00,0x46,0x05,0x02] v_add_f32 v0, v0, v0 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction -// NOVI: error: operands are not valid for this GPU or mode +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: not a valid operand. +// NOVI: error: not a valid operand. // GFX9: v_add_f32_sdwa v0, v0, v0 clamp div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x00,0x00,0x02,0x00,0xe6,0x05,0x02] v_add_f32 v0, v0, v0 clamp div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 @@ -1088,16 +1088,16 @@ v_add_f32 v0, v0, v0 clamp div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WO // Check Instructions //---------------------------------------------------------------------------// -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: instruction not supported on this GPU // GFX9: v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:BYTE_0 ; encoding: [0xf9,0x6e,0x0a,0x7e,0x01,0x16,0x00,0x00] v_screen_partition_4se_b32_sdwa v5, v1 src0_sel:BYTE_0 -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOGFX89: error: not a valid operand. v_cndmask_b32_sdwa v5, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -// NOSICI: error: sdwa variant of this instruction is not supported +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported // NOGFX89: error: not a valid operand. v_cndmask_b32_sdwa v5, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -1105,66 +1105,66 @@ v_cndmask_b32_sdwa v5, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src // Validate register size checks (bug 37943) //===----------------------------------------------------------------------===// -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // NOGFX89: error: invalid operand for instruction v_add_f32 v0, s[0:1], v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // NOGFX89: error: invalid operand for instruction v_add_f32 v0, s[0:3], v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // NOGFX89: error: invalid operand for instruction v_add_f32 v0, v[0:1], v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // NOGFX89: error: invalid operand for instruction v_add_f32 v0, v[0:2], v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // NOGFX89: error: invalid operand for instruction v_add_f32 v0, v0, s[0:1] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // NOGFX89: error: invalid operand for instruction v_add_f32 v0, s0, v[0:1] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: invalid operand for instruction +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: not a valid operand. // NOGFX89: error: invalid operand for instruction v_add_f32 v0, s0, v[0:3] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOGFX89: error: invalid operand for instruction v_add_f16 v1, v[2:3], v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOGFX89: error: invalid operand for instruction v_add_f16 v1, s[2:3], v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOGFX89: error: invalid operand for instruction v_add_f16 v1, v2, v[2:3] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOGFX89: error: invalid operand for instruction v_add_f16 v1, v2, s[2:3] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: not a valid operand // NOGFX9: error: invalid operand for instruction v_add_u32 v1, v[2:3], v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: not a valid operand // NOGFX9: error: invalid operand for instruction v_add_u32 v1, s[2:3], v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: not a valid operand // NOGFX9: error: invalid operand for instruction v_add_u32 v1, v3, v[2:3] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 -// NOSICI: error: instruction not supported on this GPU +// NOSICI: [[@LINE+3]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOVI: error: not a valid operand // NOGFX9: error: invalid operand for instruction v_add_u32 v1, v3, s[2:3] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp index 3be31de..e6370a0 100644 --- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp +++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp @@ -1450,17 +1450,23 @@ void AsmMatcherInfo::buildOperandMatchInfo() { typedef std::map>> OpClassMaskTy; OpClassMaskTy OpClassMask; + bool CallCustomParserForAllOperands = + AsmParser->getValueAsBit("CallCustomParserForAllOperands"); for (const auto &MI : Matchables) { OpClassMask.clear(); // Keep track of all operands of this instructions which belong to the // same class. + unsigned NumOptionalOps = 0; for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) { const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i]; - if (Op.Class->ParserMethod.empty()) - continue; - unsigned &OperandMask = OpClassMask[Op.Class]; - OperandMask |= (1 << i); + if (CallCustomParserForAllOperands || !Op.Class->ParserMethod.empty()) { + unsigned &OperandMask = OpClassMask[Op.Class]; + OperandMask |= maskTrailingOnes(NumOptionalOps + 1) + << (i - NumOptionalOps); + } + if (Op.Class->IsOptional) + ++NumOptionalOps; } // Generate operand match info for each mnemonic/operand class pair. @@ -2836,12 +2842,12 @@ static bool emitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info, return true; } -static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target, - const AsmMatcherInfo &Info, StringRef ClassName, - StringToOffsetTable &StringTable, - unsigned MaxMnemonicIndex, - unsigned MaxFeaturesIndex, - bool HasMnemonicFirst) { +static void +emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target, + const AsmMatcherInfo &Info, StringRef ClassName, + StringToOffsetTable &StringTable, + unsigned MaxMnemonicIndex, unsigned MaxFeaturesIndex, + bool HasMnemonicFirst, const Record &AsmParser) { unsigned MaxMask = 0; for (const OperandMatchEntry &OMI : Info.OperandMatchInfo) { MaxMask |= OMI.OperandMask; @@ -2992,9 +2998,12 @@ static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target, OS << " continue;\n\n"; // Emit call to the custom parser method + StringRef ParserName = AsmParser.getValueAsString("OperandParserMethod"); + if (ParserName.empty()) + ParserName = "tryCustomParseOperand"; OS << " // call custom parse method to handle the operand\n"; - OS << " OperandMatchResultTy Result = "; - OS << "tryCustomParseOperand(Operands, it->Class);\n"; + OS << " OperandMatchResultTy Result = " << ParserName + << "(Operands, it->Class);\n"; OS << " if (Result != MatchOperand_NoMatch)\n"; OS << " return Result;\n"; OS << " }\n\n"; @@ -3970,7 +3979,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) { if (!Info.OperandMatchInfo.empty()) emitCustomOperandParsing(OS, Target, Info, ClassName, StringTable, MaxMnemonicIndex, FeatureBitsets.size(), - HasMnemonicFirst); + HasMnemonicFirst, *AsmParser); OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n"; -- 2.7.4