From fce039240a4984a0f10b19126fd9a883ec092447 Mon Sep 17 00:00:00 2001 From: Oliver Stannard Date: Mon, 20 Oct 2014 11:00:18 +0000 Subject: [PATCH] [Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex This function can, for some offsets from the SP, split one instruction into two. Since it re-uses the original instruction as the first instruction of the result, we need ensure its result register is not marked as dead before we use it in the second instruction. llvm-svn: 220194 --- llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp | 1 + llvm/test/CodeGen/Thumb/large-stack.ll | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp index d062631..291e97b 100644 --- a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp +++ b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp @@ -418,6 +418,7 @@ rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx, } Offset = (Offset - Mask * Scale); MachineBasicBlock::iterator NII = std::next(II); + MI.getOperand(0).setIsDead(false); emitThumbRegPlusImmediate(MBB, NII, dl, DestReg, DestReg, Offset, TII, *this); } else { diff --git a/llvm/test/CodeGen/Thumb/large-stack.ll b/llvm/test/CodeGen/Thumb/large-stack.ll index fb6daa4..c371ac6 100644 --- a/llvm/test/CodeGen/Thumb/large-stack.ll +++ b/llvm/test/CodeGen/Thumb/large-stack.ll @@ -33,3 +33,22 @@ define i32 @test3() { %tmp1 = load i32* %tmp ret i32 %tmp1 } + +; Here, the adds get optimized out because they are dead, but the calculation +; of the address of stack_a is dead but not optimized out. When the address +; calculation gets expanded to two instructions, we need to avoid reading a +; dead register. +; No CHECK lines (just test for crashes), as we hope this will be optimised +; better in future. +define i32 @test4() { +entry: + %stack_a = alloca i8, align 1 + %stack_b = alloca [256 x i32*], align 4 + %int = ptrtoint i8* %stack_a to i32 + %add = add i32 %int, 1 + br label %block2 + +block2: + %add2 = add i32 %add, 1 + ret i32 0 +} -- 2.7.4