From fcdddf96022ca5a3958204c43acd9e1b773468bb Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 26 Nov 2014 21:23:15 +0000 Subject: [PATCH] R600/SI: Use ZeroOrNegativeOneBooleanContent This sort of doesn't matter since the setcc type is i1, but this previously was using the default UndefinedBooleanContent. This makes it more consistent with R600. This enables more optimizations which typically give up on UndefinedBooleanContent. For example, there is already a special case target DAG combine for setcc + sext which can be eliminated in favor of what the generic DAG combiner can do if it assumes boolean values are sign extended. Since -1 is an inline immediate, using it is basically free and the backend already uses it when a boolean value is needed in a wider type. llvm-svn: 222850 --- llvm/lib/Target/R600/AMDGPUISelLowering.cpp | 3 +++ llvm/lib/Target/R600/R600ISelLowering.cpp | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index 9ff41af..36aafa9 100644 --- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -382,6 +382,9 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : setTargetDAGCombine(ISD::SELECT_CC); setTargetDAGCombine(ISD::STORE); + setBooleanContents(ZeroOrNegativeOneBooleanContent); + setBooleanVectorContents(ZeroOrNegativeOneBooleanContent); + setSchedulingPreference(Sched::RegPressure); setJumpIsExpensive(true); diff --git a/llvm/lib/Target/R600/R600ISelLowering.cpp b/llvm/lib/Target/R600/R600ISelLowering.cpp index e22f385..1a84546 100644 --- a/llvm/lib/Target/R600/R600ISelLowering.cpp +++ b/llvm/lib/Target/R600/R600ISelLowering.cpp @@ -186,8 +186,6 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) : setOperationAction(ISD::SUBE, VT, Expand); } - setBooleanContents(ZeroOrNegativeOneBooleanContent); - setBooleanVectorContents(ZeroOrNegativeOneBooleanContent); setSchedulingPreference(Sched::Source); } -- 2.7.4