From fc7b83bcaf0334a80d175ab6b280fd838e8a5596 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Thu, 29 Dec 2022 10:44:28 +0100 Subject: [PATCH] dt-bindings: phy: rockchip: convert rockchip-dp-phy.txt to yaml Convert rockchip-dp-phy.txt to yaml. Signed-off-by: Johan Jonker Acked-By: Vinod Koul Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/aa6fe473-71f2-edba-f009-994a3dbc9802@gmail.com Signed-off-by: Heiko Stuebner --- .../bindings/phy/rockchip,rk3288-dp-phy.yaml | 41 ++++++++++++++++++++++ .../devicetree/bindings/phy/rockchip-dp-phy.txt | 26 -------------- 2 files changed, 41 insertions(+), 26 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml delete mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml new file mode 100644 index 0000000..2538235 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/rockchip,rk3288-dp-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip specific extensions to the Analogix Display Port PHY + +maintainers: + - Heiko Stuebner + +properties: + compatible: + const: rockchip,rk3288-dp-phy + + clocks: + maxItems: 1 + + clock-names: + const: 24m + + "#phy-cells": + const: 0 + +required: + - compatible + - clocks + - clock-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include + edp-phy { + compatible = "rockchip,rk3288-dp-phy"; + clocks = <&cru SCLK_EDP_24M>; + clock-names = "24m"; + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt deleted file mode 100644 index e3b4809..0000000 --- a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt +++ /dev/null @@ -1,26 +0,0 @@ -Rockchip specific extensions to the Analogix Display Port PHY ------------------------------------- - -Required properties: -- compatible : should be one of the following supported values: - - "rockchip.rk3288-dp-phy" -- clocks: from common clock binding: handle to dp clock. - of memory mapped region. -- clock-names: from common clock binding: - Required elements: "24m" -- #phy-cells : from the generic PHY bindings, must be 0; - -Example: - -grf: syscon@ff770000 { - compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; - -... - - edp_phy: edp-phy { - compatible = "rockchip,rk3288-dp-phy"; - clocks = <&cru SCLK_EDP_24M>; - clock-names = "24m"; - #phy-cells = <0>; - }; -}; -- 2.7.4