From fc64ef1a159c3ecebaf7e5b5f312e221e12f8fdd Mon Sep 17 00:00:00 2001 From: Aaron Ballman Date: Tue, 16 Feb 2016 15:29:06 +0000 Subject: [PATCH] Reverting r260922-260923; they cause link failures with MSVC. http://lab.llvm.org:8011/builders/lldb-x86-windows-msvc2015/builds/15436/steps/build/logs/stdio http://bb.pgr.jp/builders/msbuild-llvmclang-x64-msc18-DA/builds/961/steps/build_llvm/logs/stdio llvm-svn: 260972 --- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 72 ------------- .../include/llvm/CodeGen/GlobalISel/IRTranslator.h | 4 +- llvm/include/llvm/Target/TargetLowering.h | 32 ++++++ llvm/include/llvm/Target/TargetSubtargetInfo.h | 3 - llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 7 +- llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 111 --------------------- llvm/lib/Target/AArch64/AArch64CallLowering.h | 36 ------- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 78 +++++++++++++++ llvm/lib/Target/AArch64/AArch64ISelLowering.h | 9 ++ llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 9 +- llvm/lib/Target/AArch64/AArch64Subtarget.h | 3 - llvm/lib/Target/AArch64/CMakeLists.txt | 1 - 12 files changed, 125 insertions(+), 240 deletions(-) delete mode 100644 llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h delete mode 100644 llvm/lib/Target/AArch64/AArch64CallLowering.cpp delete mode 100644 llvm/lib/Target/AArch64/AArch64CallLowering.h diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h b/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h deleted file mode 100644 index 117c81c..0000000 --- a/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h +++ /dev/null @@ -1,72 +0,0 @@ -//===-- llvm/CodeGen/GlobalISel/CallLowering.h - Call lowering --*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -/// -/// \file -/// This file describes how to lower LLVM calls to machine code calls. -/// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H -#define LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H - -#include "llvm/ADT/SmallVector.h" -#include "llvm/IR/Function.h" - -namespace llvm { -// Forward declarations. -class MachineIRBuilder; -class TargetLowering; -class Value; - -class CallLowering { - const TargetLowering *TLI; - protected: - /// Getter for generic TargetLowering class. - const TargetLowering *getTLI() const { - return TLI; - } - - /// Getter for target specific TargetLowering class. - template - const XXXTargetLowering *getTLI() const { - return static_cast(TLI); - } - public: - CallLowering(const TargetLowering *TLI) : TLI(TLI) {} - virtual ~CallLowering() {} - - /// This hook must be implemented to lower outgoing return values, described - /// by \p Val, into the specified virtual register \p VReg. - /// This hook is used by GlobalISel. - /// - /// \return True if the lowering succeeds, false otherwise. - virtual bool LowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, - unsigned VReg) const { - return false; - } - - /// This hook must be implemented to lower the incoming (formal) - /// arguments, described by \p Args, for GlobalISel. Each argument - /// must end up in the related virtual register described by VRegs. - /// In other words, the first argument should end up in VRegs[0], - /// the second in VRegs[1], and so on. - /// \p MIRBuilder is set to the proper insertion for the argument - /// lowering. - /// - /// \return True if the lowering succeeded, false otherwise. - virtual bool - LowerFormalArguments(MachineIRBuilder &MIRBuilder, - const Function::ArgumentListType &Args, - const SmallVectorImpl &VRegs) const { - return false; - } -}; -} // End namespace llvm. - -#endif diff --git a/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h b/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h index a8d933a..740818c 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h @@ -28,13 +28,13 @@ namespace llvm { // Forward declarations. class BasicBlock; -class CallLowering; class Constant; class Instruction; class MachineBasicBlock; class MachineFunction; class MachineInstr; class MachineRegisterInfo; +class TargetLowering; // Technically the pass should run on an hypothetical MachineModule, // since it should translate Global into some sort of MachineGlobal. @@ -50,7 +50,7 @@ public: private: /// Interface used to lower the everything related to calls. - const CallLowering *CLI; + const TargetLowering *TLI; /// Mapping of the values of the current LLVM IR function /// to the related virtual registers. ValueToVReg ValToVReg; diff --git a/llvm/include/llvm/Target/TargetLowering.h b/llvm/include/llvm/Target/TargetLowering.h index eb64052..4f38f64 100644 --- a/llvm/include/llvm/Target/TargetLowering.h +++ b/llvm/include/llvm/Target/TargetLowering.h @@ -25,11 +25,17 @@ #include "llvm/ADT/DenseMap.h" #include "llvm/CodeGen/DAGCombine.h" +#ifdef LLVM_BUILD_GLOBAL_ISEL +#include "llvm/CodeGen/GlobalISel/Types.h" +#endif #include "llvm/CodeGen/RuntimeLibcalls.h" #include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/IR/Attributes.h" #include "llvm/IR/CallSite.h" #include "llvm/IR/CallingConv.h" +#ifdef LLVM_BUILD_GLOBAL_ISEL +# include "llvm/IR/Function.h" +#endif #include "llvm/IR/IRBuilder.h" #include "llvm/IR/InlineAsm.h" #include "llvm/IR/Instructions.h" @@ -50,6 +56,9 @@ namespace llvm { class MachineBasicBlock; class MachineFunction; class MachineInstr; +#ifdef LLVM_BUILD_GLOBAL_ISEL + class MachineIRBuilder; +#endif class MachineJumpTableInfo; class MachineLoop; class Mangler; @@ -2506,6 +2515,29 @@ public: llvm_unreachable("Not Implemented"); } +#ifdef LLVM_BUILD_GLOBAL_ISEL + virtual bool LowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, + unsigned VReg) const { + return false; + } + + /// This hook must be implemented to lower the incoming (formal) + /// arguments, described by \p Args, for GlobalISel. Each argument + /// must end up in the related virtual register described by VRegs. + /// In other words, the first argument should end up in VRegs[0], + /// the second in VRegs[1], and so on. + /// \p MIRBuilder is set to the proper insertion for the argument + /// lowering. + /// + /// \return True if the lowering succeeded, false otherwise. + virtual bool + LowerFormalArguments(MachineIRBuilder &MIRBuilder, + const Function::ArgumentListType &Args, + const SmallVectorImpl &VRegs) const { + return false; + } +#endif + /// Return true if result of the specified node is used by a return node /// only. It also compute and return the input chain for the tail call. /// diff --git a/llvm/include/llvm/Target/TargetSubtargetInfo.h b/llvm/include/llvm/Target/TargetSubtargetInfo.h index c2e36be..e988d02 100644 --- a/llvm/include/llvm/Target/TargetSubtargetInfo.h +++ b/llvm/include/llvm/Target/TargetSubtargetInfo.h @@ -21,7 +21,6 @@ namespace llvm { -class CallLowering; class DataLayout; class MachineFunction; class MachineInstr; @@ -72,7 +71,6 @@ public: // -- Pipelines and scheduling information // -- Stack frame information // -- Selection DAG lowering information - // -- Call lowering information // // N.B. These objects may change during compilation. It's not safe to cache // them between functions. @@ -84,7 +82,6 @@ public: virtual const SelectionDAGTargetInfo *getSelectionDAGInfo() const { return nullptr; } - virtual const CallLowering *getCallLowering() const { return nullptr; } /// Target can subclass this hook to select a different DAG scheduler. virtual RegisterScheduler::FunctionPassCtor getDAGScheduler(CodeGenOpt::Level) const { diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index b1a8332..ffbda5b 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -13,7 +13,6 @@ #include "llvm/CodeGen/GlobalISel/IRTranslator.h" #include "llvm/ADT/SmallVector.h" -#include "llvm/CodeGen/GlobalISel/CallLowering.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/IR/Constant.h" @@ -76,7 +75,7 @@ bool IRTranslator::translateReturn(const Instruction &Inst) { // The target may mess up with the insertion point, but // this is not important as a return is the last instruction // of the block anyway. - return CLI->LowerReturn(MIRBuilder, Ret, + return TLI->LowerReturn(MIRBuilder, Ret, !Ret ? 0 : getOrCreateVReg(Ret)); } @@ -105,7 +104,7 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &MF) { const Function &F = *MF.getFunction(); if (F.empty()) return false; - CLI = MF.getSubtarget().getCallLowering(); + TLI = MF.getSubtarget().getTargetLowering(); MIRBuilder.setFunction(MF); MRI = &MF.getRegInfo(); // Setup the arguments. @@ -114,7 +113,7 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &MF) { SmallVector VRegArgs; for (const Argument &Arg: F.args()) VRegArgs.push_back(getOrCreateVReg(&Arg)); - bool Succeeded = CLI->LowerFormalArguments(MIRBuilder, F.getArgumentList(), + bool Succeeded = TLI->LowerFormalArguments(MIRBuilder, F.getArgumentList(), VRegArgs); if (!Succeeded) report_fatal_error("Unable to lower arguments"); diff --git a/llvm/lib/Target/AArch64/AArch64CallLowering.cpp b/llvm/lib/Target/AArch64/AArch64CallLowering.cpp deleted file mode 100644 index 7df274d..0000000 --- a/llvm/lib/Target/AArch64/AArch64CallLowering.cpp +++ /dev/null @@ -1,111 +0,0 @@ -//===-- llvm/lib/Target/AArch64/AArch64CallLowering.cpp - Call lowering ---===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -/// -/// \file -/// This file implements the lowering of LLVM calls to machine code calls for -/// GlobalISel. -/// -//===----------------------------------------------------------------------===// - -#include "AArch64CallLowering.h" -#include "AArch64ISelLowering.h" - -#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" -#include "llvm/CodeGen/MachineInstrBuilder.h" - -using namespace llvm; -#ifdef LLVM_BUILD_GLOBAL_ISEL -# define EMIT_IMPLEMENTATION 1 -#else -# define EMIT_IMPLEMENTATION 0 -#endif - -AArch64CallLowering::AArch64CallLowering(const AArch64TargetLowering &TLI) - : CallLowering(&TLI) { -} - -bool AArch64CallLowering::LowerReturn(MachineIRBuilder &MIRBuilder, - const Value *Val, unsigned VReg) const { - if (!EMIT_IMPLEMENTATION) - return false; - - MachineInstr *Return = MIRBuilder.buildInstr(AArch64::RET_ReallyLR); - assert(Return && "Unable to build a return instruction?!"); - - assert(((Val && VReg) || (!Val && !VReg)) && "Return value without a vreg"); - if (VReg) { - assert(Val->getType()->isIntegerTy() && "Type not supported yet"); - unsigned Size = Val->getType()->getPrimitiveSizeInBits(); - assert((Size == 64 || Size == 32) && "Size not supported yet"); - unsigned ResReg = (Size == 32) ? AArch64::W0 : AArch64::X0; - // Set the insertion point to be right before Return. - MIRBuilder.setInstr(*Return, /* Before */ true); - MachineInstr *Copy = - MIRBuilder.buildInstr(TargetOpcode::COPY, ResReg, VReg); - (void)Copy; - assert(Copy->getNextNode() == Return && - "The insertion did not happen where we expected"); - MachineInstrBuilder(MIRBuilder.getMF(), Return) - .addReg(ResReg, RegState::Implicit); - } - return true; -} - -bool AArch64CallLowering::LowerFormalArguments( - MachineIRBuilder &MIRBuilder, const Function::ArgumentListType &Args, - const SmallVectorImpl &VRegs) const { - if (!EMIT_IMPLEMENTATION) - return false; - - MachineFunction &MF = MIRBuilder.getMF(); - const Function &F = *MF.getFunction(); - - SmallVector ArgLocs; - CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext()); - - unsigned NumArgs = Args.size(); - Function::const_arg_iterator CurOrigArg = Args.begin(); - const AArch64TargetLowering &TLI = *getTLI(); - for (unsigned i = 0; i != NumArgs; ++i, ++CurOrigArg) { - MVT ValVT = MVT::getVT(CurOrigArg->getType()); - CCAssignFn *AssignFn = - TLI.CCAssignFnForCall(F.getCallingConv(), /*IsVarArg=*/false); - bool Res = - AssignFn(i, ValVT, ValVT, CCValAssign::Full, ISD::ArgFlagsTy(), CCInfo); - assert(!Res && "Call operand has unhandled type"); - (void)Res; - } - assert(ArgLocs.size() == Args.size() && - "We have a different number of location and args?!"); - for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { - CCValAssign &VA = ArgLocs[i]; - - assert(VA.isRegLoc() && "Not yet implemented"); - // Transform the arguments in physical registers into virtual ones. - MIRBuilder.getMBB().addLiveIn(VA.getLocReg()); - MIRBuilder.buildInstr(TargetOpcode::COPY, VRegs[i], VA.getLocReg()); - - switch (VA.getLocInfo()) { - default: - llvm_unreachable("Unknown loc info!"); - case CCValAssign::Full: - break; - case CCValAssign::BCvt: - // We don't care about bitcast. - break; - case CCValAssign::AExt: - case CCValAssign::SExt: - case CCValAssign::ZExt: - // Zero/Sign extend the register. - assert(0 && "Not yet implemented"); - break; - } - } - return true; -} diff --git a/llvm/lib/Target/AArch64/AArch64CallLowering.h b/llvm/lib/Target/AArch64/AArch64CallLowering.h deleted file mode 100644 index 449a237..0000000 --- a/llvm/lib/Target/AArch64/AArch64CallLowering.h +++ /dev/null @@ -1,36 +0,0 @@ -//===-- llvm/lib/Target/AArch64/AArch64CallLowering.h - Call lowering -----===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -/// -/// \file -/// This file describes how to lower LLVM calls to machine code calls. -/// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING -#define LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING - -#include "llvm/CodeGen/GlobalISel/CallLowering.h" - -namespace llvm { - -class AArch64TargetLowering; - -class AArch64CallLowering: public CallLowering { - public: - AArch64CallLowering(const AArch64TargetLowering &TLI); - - bool LowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val, - unsigned VReg) const override; - bool - LowerFormalArguments(MachineIRBuilder &MIRBuilder, - const Function::ArgumentListType &Args, - const SmallVectorImpl &VRegs) const override; -}; -} // End of namespace llvm; -#endif diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index a18b7a6..daff2d8 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -21,6 +21,9 @@ #include "MCTargetDesc/AArch64AddressingModes.h" #include "llvm/ADT/Statistic.h" #include "llvm/CodeGen/CallingConvLower.h" +#ifdef LLVM_BUILD_GLOBAL_ISEL +# include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" +#endif #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" @@ -3392,6 +3395,81 @@ AArch64TargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, return DAG.getNode(AArch64ISD::RET_FLAG, DL, MVT::Other, RetOps); } +#ifdef LLVM_BUILD_GLOBAL_ISEL +bool AArch64TargetLowering::LowerReturn(MachineIRBuilder &MIRBuilder, + const Value *Val, unsigned VReg) const { + MachineInstr *Return = MIRBuilder.buildInstr(AArch64::RET_ReallyLR); + assert(Return && "Unable to build a return instruction?!"); + + assert(((Val && VReg) || (!Val && !VReg)) && "Return value without a vreg"); + if (VReg) { + assert(Val->getType()->isIntegerTy() && "Type not supported yet"); + unsigned Size = Val->getType()->getPrimitiveSizeInBits(); + assert((Size == 64 || Size == 32) && "Size not supported yet"); + unsigned ResReg = (Size == 32) ? AArch64::W0 : AArch64::X0; + // Set the insertion point to be right before Return. + MIRBuilder.setInstr(*Return, /* Before */ true); + MachineInstr *Copy = + MIRBuilder.buildInstr(TargetOpcode::COPY, ResReg, VReg); + (void)Copy; + assert(Copy->getNextNode() == Return && + "The insertion did not happen where we expected"); + MachineInstrBuilder(MIRBuilder.getMF(), Return) + .addReg(ResReg, RegState::Implicit); + } + return true; +} + +bool AArch64TargetLowering::LowerFormalArguments( + MachineIRBuilder &MIRBuilder, const Function::ArgumentListType &Args, + const SmallVectorImpl &VRegs) const { + MachineFunction &MF = MIRBuilder.getMF(); + const Function &F = *MF.getFunction(); + + SmallVector ArgLocs; + CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext()); + + unsigned NumArgs = Args.size(); + Function::const_arg_iterator CurOrigArg = Args.begin(); + for (unsigned i = 0; i != NumArgs; ++i, ++CurOrigArg) { + MVT ValVT = MVT::getVT(CurOrigArg->getType()); + CCAssignFn *AssignFn = + CCAssignFnForCall(F.getCallingConv(), /*IsVarArg=*/false); + bool Res = + AssignFn(i, ValVT, ValVT, CCValAssign::Full, ISD::ArgFlagsTy(), CCInfo); + assert(!Res && "Call operand has unhandled type"); + (void)Res; + } + assert(ArgLocs.size() == Args.size() && + "We have a different number of location and args?!"); + for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { + CCValAssign &VA = ArgLocs[i]; + + assert(VA.isRegLoc() && "Not yet implemented"); + // Transform the arguments in physical registers into virtual ones. + MIRBuilder.getMBB().addLiveIn(VA.getLocReg()); + MIRBuilder.buildInstr(TargetOpcode::COPY, VRegs[i], VA.getLocReg()); + + switch (VA.getLocInfo()) { + default: + llvm_unreachable("Unknown loc info!"); + case CCValAssign::Full: + break; + case CCValAssign::BCvt: + // We don't care about bitcast. + break; + case CCValAssign::AExt: + case CCValAssign::SExt: + case CCValAssign::ZExt: + // Zero/Sign extend the register. + assert(0 && "Not yet implemented"); + break; + } + } + return true; +} +#endif + //===----------------------------------------------------------------------===// // Other Lowering Code //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h index 20c468e..2879c03 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h @@ -452,6 +452,15 @@ private: const SmallVectorImpl &OutVals, SDLoc DL, SelectionDAG &DAG) const override; +#ifdef LLVM_BUILD_GLOBAL_ISEL + bool LowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val, + unsigned VReg) const override; + bool + LowerFormalArguments(MachineIRBuilder &MIRBuilder, + const Function::ArgumentListType &Args, + const SmallVectorImpl &VRegs) const override; +#endif + SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; SDValue LowerDarwinGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp index 2c7f5c0..f6ee8cf 100644 --- a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp +++ b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp @@ -57,14 +57,7 @@ AArch64Subtarget::AArch64Subtarget(const Triple &TT, const std::string &CPU, StrictAlign(false), ReserveX18(TT.isOSDarwin()), IsLittle(LittleEndian), CPUString(CPU), TargetTriple(TT), FrameLowering(), InstrInfo(initializeSubtargetDependencies(FS)), TSInfo(), - TLInfo(TM, *this), CallLoweringInfo(nullptr) {} - -const CallLowering * -AArch64Subtarget::getCallLowering() const { - if (!CallLoweringInfo) - CallLoweringInfo.reset(new AArch64CallLowering(TLInfo)); - return CallLoweringInfo.get(); -} + TLInfo(TM, *this) {} /// ClassifyGlobalReference - Find the target operand flags that describe /// how a global value should be referenced for the current subtarget. diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.h b/llvm/lib/Target/AArch64/AArch64Subtarget.h index f099637..d305422 100644 --- a/llvm/lib/Target/AArch64/AArch64Subtarget.h +++ b/llvm/lib/Target/AArch64/AArch64Subtarget.h @@ -14,7 +14,6 @@ #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H #define LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H -#include "AArch64CallLowering.h" #include "AArch64FrameLowering.h" #include "AArch64ISelLowering.h" #include "AArch64InstrInfo.h" @@ -82,7 +81,6 @@ protected: AArch64InstrInfo InstrInfo; AArch64SelectionDAGInfo TSInfo; AArch64TargetLowering TLInfo; - mutable std::unique_ptr CallLoweringInfo; private: /// initializeSubtargetDependencies - Initializes using CPUString and the /// passed in feature string so that we can use initializer lists for @@ -109,7 +107,6 @@ public: const AArch64RegisterInfo *getRegisterInfo() const override { return &getInstrInfo()->getRegisterInfo(); } - const CallLowering *getCallLowering() const override; const Triple &getTargetTriple() const { return TargetTriple; } bool enableMachineScheduler() const override { return true; } bool enablePostRAScheduler() const override { diff --git a/llvm/lib/Target/AArch64/CMakeLists.txt b/llvm/lib/Target/AArch64/CMakeLists.txt index 4e91dbb..f26327f 100644 --- a/llvm/lib/Target/AArch64/CMakeLists.txt +++ b/llvm/lib/Target/AArch64/CMakeLists.txt @@ -20,7 +20,6 @@ add_llvm_target(AArch64CodeGen AArch64AdvSIMDScalarPass.cpp AArch64AsmPrinter.cpp AArch64BranchRelaxation.cpp - AArch64CallLowering.cpp AArch64CleanupLocalDynamicTLSPass.cpp AArch64CollectLOH.cpp AArch64ConditionalCompares.cpp -- 2.7.4