From fc617690ab4d3d4077aae841d518914ebcd21fe3 Mon Sep 17 00:00:00 2001 From: Alexey Bataev Date: Thu, 1 Dec 2016 17:26:54 +0000 Subject: [PATCH] [SLP] Additional tests with the cost of vector operations. llvm-svn: 288377 --- llvm/test/Analysis/CostModel/X86/reduction.ll | 2 ++ .../SLPVectorizer/X86/reduction_unrolled.ll | 20 +++++++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/llvm/test/Analysis/CostModel/X86/reduction.ll b/llvm/test/Analysis/CostModel/X86/reduction.ll index aaafe07..99c4d00 100644 --- a/llvm/test/Analysis/CostModel/X86/reduction.ll +++ b/llvm/test/Analysis/CostModel/X86/reduction.ll @@ -34,6 +34,8 @@ define fastcc i32 @reduction_cost_int(<8 x i32> %rdx) { ; CHECK-LABEL: reduction_cost_int ; CHECK: cost of 17 {{.*}} extractelement +; AVX-LABEL: reduction_cost_int +; AVX: cost of 5 {{.*}} extractelement %r = extractelement <8 x i32> %bin.rdx.3, i32 0 ret i32 %r diff --git a/llvm/test/Transforms/SLPVectorizer/X86/reduction_unrolled.ll b/llvm/test/Transforms/SLPVectorizer/X86/reduction_unrolled.ll index 511911f..fbcfc2d 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/reduction_unrolled.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/reduction_unrolled.ll @@ -1,5 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -slp-vectorizer -slp-vectorize-hor -S -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 < %s | FileCheck %s +; RUN: opt -slp-vectorizer -slp-vectorize-hor -S -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 -debug < %s 2>&1 | FileCheck %s +; RUN: opt -slp-vectorizer -slp-vectorize-hor -S -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -debug < %s 2>&1 | FileCheck --check-prefix=SSE2 %s +; REQUIRES: asserts ; int test(unsigned int *p) { ; int sum = 0; @@ -8,6 +10,10 @@ ; return sum; ; } +; Vector cost is 5, Scalar cost is 32 +; CHECK: Adding cost -27 for reduction that starts with %7 = load i32, i32* %arrayidx.7, align 4 (It is a splitting reduction) +; Vector cost is 17, Scalar cost is 16 +; SSE2: Adding cost 1 for reduction that starts with %7 = load i32, i32* %arrayidx.7, align 4 (It is a splitting reduction) define i32 @test(i32* nocapture readonly %p) { ; CHECK-LABEL: @test( ; CHECK: [[BC:%.*]] = bitcast i32* %p to <8 x i32>* @@ -21,6 +27,18 @@ define i32 @test(i32* nocapture readonly %p) { ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <8 x i32> [[BIN_RDX4]], i32 0 ; CHECK: ret i32 [[TMP2]] ; +; SSE2-LABEL: @test( +; SSE2: [[BC:%.*]] = bitcast i32* %p to <8 x i32>* +; SSE2-NEXT: [[LD:%.*]] = load <8 x i32>, <8 x i32>* [[BC]], align 4 +; SSE2: [[RDX_SHUF:%.*]] = shufflevector <8 x i32> [[LD]], <8 x i32> undef, <8 x i32> +; SSE2-NEXT: [[BIN_RDX:%.*]] = add <8 x i32> [[LD]], [[RDX_SHUF]] +; SSE2-NEXT: [[RDX_SHUF1:%.*]] = shufflevector <8 x i32> [[BIN_RDX]], <8 x i32> undef, <8 x i32> +; SSE2-NEXT: [[BIN_RDX2:%.*]] = add <8 x i32> [[BIN_RDX]], [[RDX_SHUF1]] +; SSE2-NEXT: [[RDX_SHUF3:%.*]] = shufflevector <8 x i32> [[BIN_RDX2]], <8 x i32> undef, <8 x i32> +; SSE2-NEXT: [[BIN_RDX4:%.*]] = add <8 x i32> [[BIN_RDX2]], [[RDX_SHUF3]] +; SSE2-NEXT: [[TMP2:%.*]] = extractelement <8 x i32> [[BIN_RDX4]], i32 0 +; SSE2: ret i32 [[TMP2]] +; entry: %0 = load i32, i32* %p, align 4 %arrayidx.1 = getelementptr inbounds i32, i32* %p, i64 1 -- 2.7.4