From fb44c3223e0c36e969762dd182b4992061b455d3 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 12 Jul 2021 12:58:56 -0400 Subject: [PATCH] AMDGPU: Promote signext/zeroext i16 shader returns This makes them consistent with all the other return convention handling. If we don't do this, we lose the sext/zext flag if treated as a full assignment, which complicates a future GlobalISel patch. --- llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td | 1 + 1 file changed, 1 insertion(+) diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td b/llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td index 43cb4bf..90b5239 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td +++ b/llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td @@ -107,6 +107,7 @@ def CC_SI_SHADER : CallingConv<[ ]>; def RetCC_SI_Shader : CallingConv<[ + CCIfType<[i1, i16], CCIfExtend>>, CCIfType<[i32, i16] , CCAssignToReg<[ SGPR0, SGPR1, SGPR2, SGPR3, SGPR4, SGPR5, SGPR6, SGPR7, SGPR8, SGPR9, SGPR10, SGPR11, SGPR12, SGPR13, SGPR14, SGPR15, -- 2.7.4