From fb3e37a0140571ea374311a4325dad5d770df15c Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 6 Sep 2023 15:38:58 -0700 Subject: [PATCH] virgl, nir_to_tgsi: Add a hack for promoting partial memory barriers Most drivers will want nir_opt_barrier_modes() to optimize out unnecessary memory barrier modes. However, virgl has to translate back to GLSL, which means it can really only handle partial memory barriers in compute shaders today, because there isn't a proper way to express them otherwise. Just ask nir_to_tgsi to promote these back to full barriers as a workaround. See KHR-GL43.shader_storage_buffer_object.advanced-readWrite-case1 on virpipe-on-gl as a case where this hack is needed. Acked-by: Alyssa Rosenzweig Reviewed-by: Ian Romanick Part-of: --- src/gallium/auxiliary/nir/nir_to_tgsi.c | 17 +++++++++++++++++ src/gallium/auxiliary/nir/nir_to_tgsi.h | 1 + src/gallium/drivers/virgl/virgl_context.c | 3 ++- 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/nir/nir_to_tgsi.c b/src/gallium/auxiliary/nir/nir_to_tgsi.c index b7be666..0cca381 100644 --- a/src/gallium/auxiliary/nir/nir_to_tgsi.c +++ b/src/gallium/auxiliary/nir/nir_to_tgsi.c @@ -2458,6 +2458,23 @@ ntt_emit_barrier(struct ntt_compile *c, nir_intrinsic_instr *intr) if (modes & nir_var_mem_global) membar |= TGSI_MEMBAR_SHADER_BUFFER; + /* Hack for virglrenderer: the GLSL specific memory barrier functions, + * memoryBarrier{Buffer,Image,Shared,AtomicCounter}(), are only + * available in compute shaders prior to GLSL 4.30. In other stages, + * it needs to use the full memoryBarrier(). It may be possible to + * make them available via #extension directives in older versions, + * but it's confusingly underspecified, and Mesa/virglrenderer don't + * currently agree on how to do it. So, just promote partial memory + * barriers back to full ones outside of compute shaders when asked. + */ + if (membar && !compute && + c->options->non_compute_membar_needs_all_modes) { + membar |= TGSI_MEMBAR_SHADER_BUFFER | + TGSI_MEMBAR_ATOMIC_BUFFER | + TGSI_MEMBAR_SHADER_IMAGE | + TGSI_MEMBAR_SHARED; + } + /* If we only need workgroup scope (not device-scope), we might be able to * optimize a bit. */ diff --git a/src/gallium/auxiliary/nir/nir_to_tgsi.h b/src/gallium/auxiliary/nir/nir_to_tgsi.h index cfdabc5..48c6685 100644 --- a/src/gallium/auxiliary/nir/nir_to_tgsi.h +++ b/src/gallium/auxiliary/nir/nir_to_tgsi.h @@ -37,6 +37,7 @@ struct nir_to_tgsi_options { bool lower_fabs; bool unoptimized_ra; bool lower_ssbo_bindings; + bool non_compute_membar_needs_all_modes; uint32_t ubo_vec4_max; }; diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c index 0720561..597d59e 100644 --- a/src/gallium/drivers/virgl/virgl_context.c +++ b/src/gallium/drivers/virgl/virgl_context.c @@ -710,7 +710,8 @@ static void *virgl_shader_encoder(struct pipe_context *ctx, .unoptimized_ra = true, .lower_fabs = true, .lower_ssbo_bindings = - rs->caps.caps.v2.host_feature_check_version >= 16 + rs->caps.caps.v2.host_feature_check_version >= 16, + .non_compute_membar_needs_all_modes = true }; if (!(rs->caps.caps.v2.capability_bits_v2 & VIRGL_CAP_V2_TEXTURE_SHADOW_LOD) && -- 2.7.4