From fb1795c4429eecc3af14f51417664aeba15fb0de Mon Sep 17 00:00:00 2001 From: Dan Carney Date: Fri, 14 Nov 2014 09:56:56 +0100 Subject: [PATCH] [turbofan] small cleanups to aid register allocator debugging BUG= R=bmeurer@chromium.org Review URL: https://codereview.chromium.org/727693002 Cr-Commit-Position: refs/heads/master@{#25350} --- src/compiler/pipeline.cc | 11 +++----- src/compiler/register-allocator.cc | 52 +++++++++++++++++++++----------------- src/compiler/register-allocator.h | 1 + 3 files changed, 34 insertions(+), 30 deletions(-) diff --git a/src/compiler/pipeline.cc b/src/compiler/pipeline.cc index 53a0afc..e4d8c5d 100644 --- a/src/compiler/pipeline.cc +++ b/src/compiler/pipeline.cc @@ -110,6 +110,8 @@ class PipelineData { } Zone* instruction_zone() const { return instruction_zone_; } + // RawMachineAssembler generally produces graphs which cannot be verified. + bool MayHaveUnverifiableGraph() const { return outer_zone_ == nullptr; } void DeleteGraphZone() { // Destroy objects with destructors first. @@ -563,12 +565,7 @@ Handle Pipeline::GenerateCode(Linkage* linkage, PipelineData* data) { selector.SelectInstructions(); } - if (FLAG_trace_turbo) { - OFStream os(stdout); - PrintableInstructionSequence printable = { - RegisterConfiguration::ArchDefault(), &sequence}; - os << "----- Instruction sequence before register allocation -----\n" - << printable; + if (FLAG_trace_turbo && !data->MayHaveUnverifiableGraph()) { TurboCfgFile tcf(isolate()); tcf << AsC1V("CodeGen", data->schedule(), data->source_positions(), &sequence); @@ -609,7 +606,7 @@ Handle Pipeline::GenerateCode(Linkage* linkage, PipelineData* data) { info()->AbortOptimization(kNotEnoughVirtualRegistersRegalloc); return Handle::null(); } - if (FLAG_trace_turbo) { + if (FLAG_trace_turbo && !data->MayHaveUnverifiableGraph()) { TurboCfgFile tcf(isolate()); tcf << AsC1VAllocator("CodeGen", &allocator); } diff --git a/src/compiler/register-allocator.cc b/src/compiler/register-allocator.cc index 23a7df6..c314509 100644 --- a/src/compiler/register-allocator.cc +++ b/src/compiler/register-allocator.cc @@ -1125,7 +1125,6 @@ bool RegisterAllocator::Allocate(PipelineStatistics* stats) { PhaseScope phase_scope(stats, "meet register constraints"); MeetRegisterConstraints(); } - if (!AllocationOk()) return false; { PhaseScope phase_scope(stats, "resolve phis"); ResolvePhis(); @@ -1134,6 +1133,14 @@ bool RegisterAllocator::Allocate(PipelineStatistics* stats) { PhaseScope phase_scope(stats, "build live ranges"); BuildLiveRanges(); } + if (FLAG_trace_turbo) { + OFStream os(stdout); + PrintableInstructionSequence printable = {config(), code()}; + os << "----- Instruction sequence before register allocation -----\n" + << printable; + } + // This can be triggered in debug mode. + DCHECK(!ExistsUseWithoutDefinition()); { PhaseScope phase_scope(stats, "allocate general registers"); AllocateGeneralRegisters(); @@ -1487,28 +1494,6 @@ void RegisterAllocator::BuildLiveRanges() { live_in_sets_[i]->Union(*live); } } - -#ifdef DEBUG - if (block_id == 0) { - BitVector::Iterator iterator(live); - bool found = false; - while (!iterator.Done()) { - found = true; - int operand_index = iterator.Current(); - PrintF("Register allocator error: live v%d reached first block.\n", - operand_index); - LiveRange* range = LiveRangeFor(operand_index); - PrintF(" (first use is at %d)\n", range->first_pos()->pos().Value()); - if (debug_name() == nullptr) { - PrintF("\n"); - } else { - PrintF(" (function: %s)\n", debug_name()); - } - iterator.Advance(); - } - DCHECK(!found); - } -#endif } for (int i = 0; i < live_ranges_.length(); ++i) { @@ -1539,6 +1524,27 @@ void RegisterAllocator::BuildLiveRanges() { } +bool RegisterAllocator::ExistsUseWithoutDefinition() { + bool found = false; + BitVector::Iterator iterator(live_in_sets_[0]); + while (!iterator.Done()) { + found = true; + int operand_index = iterator.Current(); + PrintF("Register allocator error: live v%d reached first block.\n", + operand_index); + LiveRange* range = LiveRangeFor(operand_index); + PrintF(" (first use is at %d)\n", range->first_pos()->pos().Value()); + if (debug_name() == nullptr) { + PrintF("\n"); + } else { + PrintF(" (function: %s)\n", debug_name()); + } + iterator.Advance(); + } + return found; +} + + bool RegisterAllocator::SafePointsAreInOrder() const { int safe_point = 0; const PointerMapDeque* pointer_maps = code()->pointer_maps(); diff --git a/src/compiler/register-allocator.h b/src/compiler/register-allocator.h index a6578af..067ed87 100644 --- a/src/compiler/register-allocator.h +++ b/src/compiler/register-allocator.h @@ -388,6 +388,7 @@ class RegisterAllocator FINAL { bool IsOutputRegisterOf(Instruction* instr, int index); bool IsOutputDoubleRegisterOf(Instruction* instr, int index); void ProcessInstructions(const InstructionBlock* block, BitVector* live); + bool ExistsUseWithoutDefinition(); void MeetRegisterConstraints(const InstructionBlock* block); void MeetConstraintsBetween(Instruction* first, Instruction* second, int gap_index); -- 2.7.4