From fad8575f6045085a11d2414a231f9ec9e96ac4eb Mon Sep 17 00:00:00 2001 From: rth Date: Fri, 20 Jul 2001 16:55:03 +0000 Subject: [PATCH] * regclass.c (N_REG_INTS): Use only 32 bits per element. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@44201 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 6 +++++- gcc/regclass.c | 5 +++-- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3943705..bfa00fa 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,8 @@ -2001-06-20 Kelley Cook +2001-07-20 Roman Lechtchinsky + + * regclass.c (N_REG_INTS): Use only 32 bits per element. + +2001-07-20 Kelley Cook * doc/install.texi (sparc-sun-solaris*): Add in 4.x assembler bug information. Move rest into ... diff --git a/gcc/regclass.c b/gcc/regclass.c index c022b0a..bfde1e9 100644 --- a/gcc/regclass.c +++ b/gcc/regclass.c @@ -140,10 +140,11 @@ HARD_REG_SET reg_class_contents[N_REG_CLASSES]; /* The same information, but as an array of unsigned ints. We copy from these unsigned ints to the table above. We do this so the tm.h files - do not have to be aware of the wordsize for machines with <= 64 regs. */ + do not have to be aware of the wordsize for machines with <= 64 regs. + Note that we hard-code 32 here, not HOST_BITS_PER_INT. */ #define N_REG_INTS \ - ((FIRST_PSEUDO_REGISTER + (HOST_BITS_PER_INT - 1)) / HOST_BITS_PER_INT) + ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32) static unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS] = REG_CLASS_CONTENTS; -- 2.7.4