From fab70acf83c36eb06612f9c43083b7c3f13e428b Mon Sep 17 00:00:00 2001 From: Yung-Ching LIN Date: Wed, 29 Mar 2017 01:51:25 +0800 Subject: [PATCH] board: advantech: dms-ba16: apply the proper register setting to fix the voltage peak issue Apply the proper setting for the reserved bits in SetDes Test and System Mode Control register to avoid the voltage peak issue while we do the IEEE PHY comformance test Signed-off-by: Ken Lin Acked-by: Akshay Bhat --- board/advantech/dms-ba16/dms-ba16.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c index 75b0bbc..91e96ab 100644 --- a/board/advantech/dms-ba16/dms-ba16.c +++ b/board/advantech/dms-ba16/dms-ba16.c @@ -304,7 +304,8 @@ static int mx6_rgmii_rework(struct phy_device *phydev) /* set debug port address: SerDes Test and System Mode Control */ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); /* enable rgmii tx clock delay */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); + /* set the reserved bits to avoid board specific voltage peak issue*/ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47); return 0; } -- 2.7.4