From fa2fd534b5d80d59b9043f2d8291fcb1c6c75a5b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:07 -0500 Subject: [PATCH] global: Migrate CONFIG_X86_MRC_ADDR to CFG Perform a simple rename of CONFIG_X86_MRC_ADDR to CFG_X86_MRC_ADDR Signed-off-by: Tom Rini --- arch/x86/cpu/intel_common/mrc.c | 2 +- arch/x86/dts/u-boot.dtsi | 2 +- include/configs/x86-chromebook.h | 2 +- tools/binman/binman.rst | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c index a4918fb..69405d7 100644 --- a/arch/x86/cpu/intel_common/mrc.c +++ b/arch/x86/cpu/intel_common/mrc.c @@ -200,7 +200,7 @@ static int sdram_initialise(struct udevice *dev, struct udevice *me_dev, debug("PEI data at %p:\n", pei_data); - data = (char *)CONFIG_X86_MRC_ADDR; + data = (char *)CFG_X86_MRC_ADDR; if (data) { int rv; ulong start; diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi index 24e692f..454efc1 100644 --- a/arch/x86/dts/u-boot.dtsi +++ b/arch/x86/dts/u-boot.dtsi @@ -86,7 +86,7 @@ #endif #ifdef CONFIG_HAVE_MRC intel-mrc { - offset = ; + offset = ; }; #endif #ifdef CONFIG_FSP_VERSION1 diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 41fb499..059e3a0 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -6,7 +6,7 @@ #ifndef _X86_CHROMEBOOK_H #define _X86_CHROMEBOOK_H -#define CONFIG_X86_MRC_ADDR 0xfffa0000 +#define CFG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_X86_REFCODE_ADDR 0xffea0000 #define CONFIG_X86_REFCODE_RUN_ADDR 0 diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst index e7b231e..69e4b00 100644 --- a/tools/binman/binman.rst +++ b/tools/binman/binman.rst @@ -298,7 +298,7 @@ C preprocessor:: #ifdef CONFIG_HAVE_MRC intel-mrc { - offset = ; + offset = ; }; #endif -- 2.7.4