From fa15f3608e45d905bc85ad0a612f538e14ed3d2c Mon Sep 17 00:00:00 2001 From: "Kim, HeungJun" Date: Tue, 26 May 2009 17:45:59 +0900 Subject: [PATCH] [S5PC100] clean codes for making patch file --- cpu/arm_cortexa8/cpu.c | 1 + cpu/arm_cortexa8/s5pc100/cpu_init.S | 2 +- cpu/arm_cortexa8/s5pc100/interrupts.c | 69 +++++++++++++++++++++++++---------- cpu/arm_cortexa8/s5pc100/speed.c | 2 +- cpu/arm_cortexa8/start.S | 2 +- 5 files changed, 53 insertions(+), 23 deletions(-) diff --git a/cpu/arm_cortexa8/cpu.c b/cpu/arm_cortexa8/cpu.c index 9cf0645..4c6cd36 100644 --- a/cpu/arm_cortexa8/cpu.c +++ b/cpu/arm_cortexa8/cpu.c @@ -123,6 +123,7 @@ void l2cache_enable() __asm__ __volatile__("mov r0, %0":"=r"(i)); __asm__ __volatile__("mov r12, %0":"=r"(j)); } + } void l2cache_disable() diff --git a/cpu/arm_cortexa8/s5pc100/cpu_init.S b/cpu/arm_cortexa8/s5pc100/cpu_init.S index f7f1085..66ccb20 100644 --- a/cpu/arm_cortexa8/s5pc100/cpu_init.S +++ b/cpu/arm_cortexa8/s5pc100/cpu_init.S @@ -71,7 +71,7 @@ mem_ctrl_asm_init: ldr r1, =0xff001010 str r1, [r0] - /* + /* * BL%LE %LONG4, 2 chip, LPDDR, dynamic self refresh, * force precharge, dynamic power down off */ diff --git a/cpu/arm_cortexa8/s5pc100/interrupts.c b/cpu/arm_cortexa8/s5pc100/interrupts.c index e3d456c..445965d 100644 --- a/cpu/arm_cortexa8/s5pc100/interrupts.c +++ b/cpu/arm_cortexa8/s5pc100/interrupts.c @@ -53,7 +53,7 @@ static ulong count_value; /* Internal tick units */ static unsigned long long timestamp; /* Monotonic incrementing timer */ -static unsigned long lastdec; /* Last decremneter snapshot */ +static unsigned long lastdec; /* Last decremneter snapshot */ /* macro to read the 16 bit timer */ static inline ulong READ_TIMER(void) @@ -67,8 +67,11 @@ int interrupt_init(void) { s5pc1xx_timers *const timers = (s5pc1xx_timers *)S5P_TIMER_BASE; - /* PWM Timer 4 */ - /* Timer Freq(HZ) = PCLK / { (prescaler_value + 1) * (divider_value) } */ + /* + * @ PWM Timer 4 + * Timer Freq(HZ) = + * PCLK / { (prescaler_value + 1) * (divider_value) } + */ /* set prescaler : 16 */ /* set divider : 2 */ @@ -79,10 +82,11 @@ int interrupt_init(void) /* reset initial value */ /* count_value = 2085937.5(HZ) (per 1 sec)*/ - count_value = get_PCLK() / ((PRESCALER_0 + 1) * (MUX4_DIV_12 + 1)); + count_value = get_PCLK() / ((PRESCALER_0 + 1) * + (MUX4_DIV_12 + 1)); /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ - count_value = count_value / 100; + count_value = count_value / 100; } /* set count value */ @@ -90,10 +94,12 @@ int interrupt_init(void) lastdec = count_value; /* auto reload & manual update */ - timers->TCON = (timers->TCON & ~(0x03 << 20)) | S5P_TCON4_AUTO_RELOAD | S5P_TCON4_UPDATE; + timers->TCON = (timers->TCON & ~(0x03 << 20)) | + S5P_TCON4_AUTO_RELOAD | S5P_TCON4_UPDATE; /* start PWM timer 4 */ - timers->TCON = (timers->TCON & ~(0x03 << 20)) | S5P_TCON4_AUTO_RELOAD | S5P_TCON4_ON; + timers->TCON = (timers->TCON & ~(0x03 << 20)) | + S5P_TCON4_AUTO_RELOAD | S5P_TCON4_ON; timestamp = 0; @@ -125,25 +131,44 @@ void udelay(unsigned long usec) { ulong tmo, tmp; - if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ - tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ - tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ - tmo /= 1000; /* finish normalize. */ + if (usec >= 1000) { - } else { /* else small number, don't kill it prior to HZ multiply */ + /* + * if "big" number, spread normalization + * to seconds + * 1. start to normalize for usec to ticks per sec + * 2. find number of "ticks" to wait to achieve target + * 3. finish normalize. + */ + tmo = usec / 1000; + tmo *= CONFIG_SYS_HZ; + tmo /= 1000; + + } else { + /* else small number, don't kill it prior to HZ multiply */ tmo = usec * CONFIG_SYS_HZ; tmo /= (1000 * 1000); } - tmp = get_timer(0); /* get current timestamp */ - if ((tmo + tmp + 1) < tmp) { /* if setting this fordward will roll time stamp */ - reset_timer_masked(); /* reset "advancing" timestamp to 0, set lastdec value */ + /* get current timestamp */ + tmp = get_timer(0); + + if ((tmo + tmp + 1) < tmp) { + + /* if setting this fordward will roll time stamp */ + /* reset "advancing" timestamp to 0, set lastdec value */ + reset_timer_masked(); + } else { - tmo += tmp; /* else, set advancing stamp wake up time */ + + /* else, set advancing stamp wake up time */ + tmo += tmp; } - while (get_timer_masked() < tmo); /* loop till event */ + /* loop till event */ + while (get_timer_masked() < tmo) + ; /* nop */ } void reset_timer_masked(void) @@ -159,9 +184,13 @@ ulong get_timer_masked(void) ulong now = READ_TIMER(); if (lastdec >= now) { - timestamp += lastdec - now; /* normal mode */ + /* normal mode */ + timestamp += lastdec - now; + } else { - timestamp += lastdec + count_value - now; /* overflow */ + /* overflow */ + timestamp += lastdec + count_value - now; + } lastdec = now; @@ -178,7 +207,7 @@ unsigned long long get_ticks(void) } /* - * This function is derived from PowerPC code (timebase clock frequency). + * This function is derived from PowerPC code (timebase clock frequency). * On ARM it returns the number of timer ticks per second. */ ulong get_tbclk(void) diff --git a/cpu/arm_cortexa8/s5pc100/speed.c b/cpu/arm_cortexa8/s5pc100/speed.c index d3150b0..31ccc1e 100644 --- a/cpu/arm_cortexa8/s5pc100/speed.c +++ b/cpu/arm_cortexa8/s5pc100/speed.c @@ -77,7 +77,7 @@ static ulong get_PLLCLK(int pllreg) if (pllreg == APLL) mask = 0x3ff; - else + else mask = 0x1ff; m = (r >> 16) & mask; diff --git a/cpu/arm_cortexa8/start.S b/cpu/arm_cortexa8/start.S index d91b37e..07acdbd 100644 --- a/cpu/arm_cortexa8/start.S +++ b/cpu/arm_cortexa8/start.S @@ -215,7 +215,7 @@ cpu_init_crit: * wake up conditions. */ mov ip, lr @ persevere link reg across call - bl lowlevel_init @ go setup pll,mux,memory + bl lowlevel_init @ go setup pll,mux,memory mov lr, ip @ restore link mov pc, lr @ back to my caller /* -- 2.7.4