From fa097f8f3d30979016cab7db682c45260481b531 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 4 Aug 2014 18:49:22 +0000 Subject: [PATCH] R600/SI: Fix definitions for ds_read2 / ds_write2 instructions. These were just wrong, using the wrong register classes and store2 was missing an operand. llvm-svn: 214756 --- llvm/lib/Target/R600/SIInstrInfo.td | 3 ++- llvm/lib/Target/R600/SIInstructions.td | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/R600/SIInstrInfo.td b/llvm/lib/Target/R600/SIInstrInfo.td index 91e4d0d..b8e6f23 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.td +++ b/llvm/lib/Target/R600/SIInstrInfo.td @@ -818,7 +818,8 @@ class DS_Store_Helper op, string asm, RegisterClass regClass> : DS_1A < class DS_Store2_Helper op, string asm, RegisterClass regClass> : DS_1A < op, (outs), - (ins i1imm:$gds, VReg_32:$addr, regClass:$data0, u8imm:$offset0, u8imm:$offset1), + (ins i1imm:$gds, VReg_32:$addr, regClass:$data0, regClass:$data1, + u8imm:$offset0, u8imm:$offset1), asm#" $addr, $data0, $data1, $offset0, $offset1 [M0]", []> { let mayStore = 1; diff --git a/llvm/lib/Target/R600/SIInstructions.td b/llvm/lib/Target/R600/SIInstructions.td index 5ddc8dd..b171dd2 100644 --- a/llvm/lib/Target/R600/SIInstructions.td +++ b/llvm/lib/Target/R600/SIInstructions.td @@ -826,8 +826,8 @@ def DS_READ_U16 : DS_Load_Helper <0x0000003c, "DS_READ_U16", VReg_32>; def DS_READ_B64 : DS_Load_Helper <0x00000076, "DS_READ_B64", VReg_64>; // 2 forms. -def DS_WRITE2_B32 : DS_Load2_Helper <0x0000000E, "DS_WRITE2_B32", VReg_64>; -def DS_WRITE2_B64 : DS_Load2_Helper <0x0000004E, "DS_WRITE2_B64", VReg_128>; +def DS_WRITE2_B32 : DS_Store2_Helper <0x0000000E, "DS_WRITE2_B32", VReg_32>; +def DS_WRITE2_B64 : DS_Store2_Helper <0x0000004E, "DS_WRITE2_B64", VReg_64>; def DS_READ2_B32 : DS_Load2_Helper <0x00000037, "DS_READ2_B32", VReg_64>; def DS_READ2_B64 : DS_Load2_Helper <0x00000075, "DS_READ2_B64", VReg_128>; -- 2.7.4