From f99398fe0ee943c3c0493da0d6488d45658f7327 Mon Sep 17 00:00:00 2001
From: Amir Ayupov <aaupov@fb.com>
Date: Tue, 5 Apr 2022 14:30:44 -0700
Subject: [PATCH] [BOLT][NFC] Move isADD64rr and isADDri out of MCPlusBuilder
 class

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D123077
---
 bolt/include/bolt/Core/MCPlusBuilder.h           |  5 -----
 bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp |  2 --
 bolt/lib/Target/X86/X86MCPlusBuilder.cpp         | 16 +++++++---------
 3 files changed, 7 insertions(+), 16 deletions(-)

diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h b/bolt/include/bolt/Core/MCPlusBuilder.h
index 02588c2..64e98e5 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -511,11 +511,6 @@ public:
     return 0;
   }
 
-  virtual bool isADD64rr(const MCInst &Inst) const {
-    llvm_unreachable("not implemented");
-    return false;
-  }
-
   virtual bool isSUB(const MCInst &Inst) const {
     llvm_unreachable("not implemented");
     return false;
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index c4bceac..e83a09c 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -1103,8 +1103,6 @@ public:
 
   bool isMoveMem2Reg(const MCInst &Inst) const override { return false; }
 
-  bool isADD64rr(const MCInst &Inst) const override { return false; }
-
   bool isLeave(const MCInst &Inst) const override { return false; }
 
   bool isPop(const MCInst &Inst) const override { return false; }
diff --git a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
index b7678cb..8268170 100644
--- a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
+++ b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
@@ -68,6 +68,13 @@ bool isMOVSX64rm32(const MCInst &Inst) {
   return Inst.getOpcode() == X86::MOVSX64rm32;
 }
 
+bool isADD64rr(const MCInst &Inst) { return Inst.getOpcode() == X86::ADD64rr; }
+
+bool isADDri(const MCInst &Inst) {
+  return Inst.getOpcode() == X86::ADD64ri32 ||
+         Inst.getOpcode() == X86::ADD64ri8;
+}
+
 class X86MCPlusBuilder : public MCPlusBuilder {
 public:
   X86MCPlusBuilder(const MCInstrAnalysis *Analysis, const MCInstrInfo *Info,
@@ -292,19 +299,10 @@ public:
     return 0;
   }
 
-  bool isADD64rr(const MCInst &Inst) const override {
-    return Inst.getOpcode() == X86::ADD64rr;
-  }
-
   bool isSUB(const MCInst &Inst) const override {
     return X86::isSUB(Inst.getOpcode());
   }
 
-  bool isADDri(const MCInst &Inst) const {
-    return Inst.getOpcode() == X86::ADD64ri32 ||
-           Inst.getOpcode() == X86::ADD64ri8;
-  }
-
   bool isLEA64r(const MCInst &Inst) const override {
     return Inst.getOpcode() == X86::LEA64r;
   }
-- 
2.7.4