From f956840dbe41f3121ecceea24e0f1aa15cb0f5bb Mon Sep 17 00:00:00 2001
From: Sanjay Patel <spatel@rotateright.com>
Date: Sun, 7 Oct 2018 16:27:50 +0000
Subject: [PATCH] [x86] add vector fadd with undef elts test; NFC

llvm-svn: 343944
---
 llvm/test/CodeGen/X86/fadd-combines.ll | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/llvm/test/CodeGen/X86/fadd-combines.ll b/llvm/test/CodeGen/X86/fadd-combines.ll
index f9d899e..efd31d4 100644
--- a/llvm/test/CodeGen/X86/fadd-combines.ll
+++ b/llvm/test/CodeGen/X86/fadd-combines.ll
@@ -17,6 +17,16 @@ define <4 x float> @fadd_zero_4f32(<4 x float> %x) #0 {
   ret <4 x float> %y
 }
 
+define <4 x float> @fadd_zero_4f32_undef(<4 x float> %x) {
+; CHECK-LABEL: fadd_zero_4f32_undef:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorps %xmm1, %xmm1
+; CHECK-NEXT:    addps %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %y = fadd nsz <4 x float> %x, <float 0.0, float undef, float 0.0, float undef>
+  ret <4 x float> %y
+}
+
 ; CHECK: float 3
 define float @fadd_2const_f32(float %x) #0 {
 ; CHECK-LABEL: fadd_2const_f32:
-- 
2.7.4