From f95351b918c98ed15a742da572a42d23a1400196 Mon Sep 17 00:00:00 2001 From: Dinar Temirbulatov Date: Fri, 22 Mar 2019 14:50:53 +0000 Subject: [PATCH] [SLPVectorizer] Add test related to SLP Throttling support, NFCI. llvm-svn: 356754 --- .../Transforms/SLPVectorizer/X86/slp-throttle.ll | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/slp-throttle.ll diff --git a/llvm/test/Transforms/SLPVectorizer/X86/slp-throttle.ll b/llvm/test/Transforms/SLPVectorizer/X86/slp-throttle.ll new file mode 100644 index 0000000..6752641 --- /dev/null +++ b/llvm/test/Transforms/SLPVectorizer/X86/slp-throttle.ll @@ -0,0 +1,37 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 < %s | FileCheck %s + +define dso_local void @rftbsub(double* %a) local_unnamed_addr #0 { +; CHECK-LABEL: @rftbsub( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[A:%.*]], i64 2 +; CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[ARRAYIDX6]], align 8 +; CHECK-NEXT: [[TMP1:%.*]] = or i64 2, 1 +; CHECK-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds double, double* [[A]], i64 [[TMP1]] +; CHECK-NEXT: [[TMP2:%.*]] = load double, double* [[ARRAYIDX12]], align 8 +; CHECK-NEXT: [[ADD16:%.*]] = fadd double [[TMP2]], undef +; CHECK-NEXT: [[MUL18:%.*]] = fmul double undef, [[ADD16]] +; CHECK-NEXT: [[ADD19:%.*]] = fadd double undef, [[MUL18]] +; CHECK-NEXT: [[SUB22:%.*]] = fsub double undef, undef +; CHECK-NEXT: [[SUB25:%.*]] = fsub double [[TMP0]], [[ADD19]] +; CHECK-NEXT: store double [[SUB25]], double* [[ARRAYIDX6]], align 8 +; CHECK-NEXT: [[SUB29:%.*]] = fsub double [[TMP2]], [[SUB22]] +; CHECK-NEXT: store double [[SUB29]], double* [[ARRAYIDX12]], align 8 +; CHECK-NEXT: unreachable +; +entry: + %arrayidx6 = getelementptr inbounds double, double* %a, i64 2 + %0 = load double, double* %arrayidx6, align 8 + %1 = or i64 2, 1 + %arrayidx12 = getelementptr inbounds double, double* %a, i64 %1 + %2 = load double, double* %arrayidx12, align 8 + %add16 = fadd double %2, undef + %mul18 = fmul double undef, %add16 + %add19 = fadd double undef, %mul18 + %sub22 = fsub double undef, undef + %sub25 = fsub double %0, %add19 + store double %sub25, double* %arrayidx6, align 8 + %sub29 = fsub double %2, %sub22 + store double %sub29, double* %arrayidx12, align 8 + unreachable +} -- 2.7.4