From f90cc633de9f75715a3efc87c25c39a2de3ce53e Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 27 Feb 2020 14:34:37 +0000 Subject: [PATCH] Fix cppcheck definition/declaration arg mismatch warnings. NFCI. --- llvm/lib/Target/X86/X86ISelLowering.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.h | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 56aa33a..2bf8633 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -30487,7 +30487,7 @@ bool X86TargetLowering::isNarrowingProfitable(EVT VT1, EVT VT2) const { /// VECTOR_SHUFFLE operations, those with specific masks. /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values /// are assumed to be legal. -bool X86TargetLowering::isShuffleMaskLegal(ArrayRef M, EVT VT) const { +bool X86TargetLowering::isShuffleMaskLegal(ArrayRef Mask, EVT VT) const { if (!VT.isSimple()) return false; diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h index c2c5029..d102685 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.h +++ b/llvm/lib/Target/X86/X86ISelLowering.h @@ -1326,7 +1326,7 @@ namespace llvm { unsigned getAddressSpace(void) const; - SDValue FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, bool isSigned, + SDValue FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, bool IsSigned, SDValue &Chain) const; SDValue LRINT_LLRINTHelper(SDNode *N, SelectionDAG &DAG) const; @@ -1419,7 +1419,7 @@ namespace llvm { const MCPhysReg *getScratchRegisters(CallingConv::ID CC) const override; TargetLoweringBase::AtomicExpansionKind - shouldExpandAtomicLoadInIR(LoadInst *SI) const override; + shouldExpandAtomicLoadInIR(LoadInst *LI) const override; bool shouldExpandAtomicStoreInIR(StoreInst *SI) const override; TargetLoweringBase::AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const override; @@ -1498,15 +1498,15 @@ namespace llvm { SDValue &X86CC) const; /// Check if replacement of SQRT with RSQRT should be disabled. - bool isFsqrtCheap(SDValue Operand, SelectionDAG &DAG) const override; + bool isFsqrtCheap(SDValue Op, SelectionDAG &DAG) const override; /// Use rsqrt* to speed up sqrt calculations. - SDValue getSqrtEstimate(SDValue Operand, SelectionDAG &DAG, int Enabled, + SDValue getSqrtEstimate(SDValue Op, SelectionDAG &DAG, int Enabled, int &RefinementSteps, bool &UseOneConstNR, bool Reciprocal) const override; /// Use rcp* to speed up fdiv calculations. - SDValue getRecipEstimate(SDValue Operand, SelectionDAG &DAG, int Enabled, + SDValue getRecipEstimate(SDValue Op, SelectionDAG &DAG, int Enabled, int &RefinementSteps) const override; /// Reassociate floating point divisions into multiply by reciprocal. -- 2.7.4