From f90babb567bde389a0b65e0191c63dfc9ac52cb0 Mon Sep 17 00:00:00 2001 From: Konstantin Seurer Date: Thu, 14 Jul 2022 11:13:18 +0200 Subject: [PATCH] radv: Use nir_gen_rect_vertices Signed-off-by: Konstantin Seurer Reviewed-by: Iago Toral Quiroga Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_meta.c | 34 +--------------------------------- src/amd/vulkan/radv_meta.h | 3 +-- src/amd/vulkan/radv_meta_blit.c | 2 +- src/amd/vulkan/radv_meta_blit2d.c | 2 +- src/amd/vulkan/radv_meta_clear.c | 4 ++-- 5 files changed, 6 insertions(+), 39 deletions(-) diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_meta.c index bcfcd85..c0c2759 100644 --- a/src/amd/vulkan/radv_meta.c +++ b/src/amd/vulkan/radv_meta.c @@ -714,38 +714,6 @@ nir_builder PRINTFLIKE(3, 4) return b; } -nir_ssa_def * -radv_meta_gen_rect_vertices_comp2(nir_builder *vs_b, nir_ssa_def *comp2) -{ - - nir_ssa_def *vertex_id = nir_load_vertex_id_zero_base(vs_b); - - /* vertex 0 - -1.0, -1.0 */ - /* vertex 1 - -1.0, 1.0 */ - /* vertex 2 - 1.0, -1.0 */ - /* so channel 0 is vertex_id != 2 ? -1.0 : 1.0 - channel 1 is vertex id != 1 ? -1.0 : 1.0 */ - - nir_ssa_def *c0cmp = nir_ine_imm(vs_b, vertex_id, 2); - nir_ssa_def *c1cmp = nir_ine_imm(vs_b, vertex_id, 1); - - nir_ssa_def *comp[4]; - comp[0] = nir_bcsel(vs_b, c0cmp, nir_imm_float(vs_b, -1.0), nir_imm_float(vs_b, 1.0)); - - comp[1] = nir_bcsel(vs_b, c1cmp, nir_imm_float(vs_b, -1.0), nir_imm_float(vs_b, 1.0)); - comp[2] = comp2; - comp[3] = nir_imm_float(vs_b, 1.0); - nir_ssa_def *outvec = nir_vec(vs_b, comp, 4); - - return outvec; -} - -nir_ssa_def * -radv_meta_gen_rect_vertices(nir_builder *vs_b) -{ - return radv_meta_gen_rect_vertices_comp2(vs_b, nir_imm_float(vs_b, 0.0)); -} - /* vertex shader that generates vertices */ nir_shader * radv_meta_build_nir_vs_generate_vertices(struct radv_device *dev) @@ -756,7 +724,7 @@ radv_meta_build_nir_vs_generate_vertices(struct radv_device *dev) nir_builder b = radv_meta_init_shader(dev, MESA_SHADER_VERTEX, "meta_vs_gen_verts"); - nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b); + nir_ssa_def *outvec = nir_gen_rect_vertices(&b, NULL, NULL); v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4, "gl_Position"); v_position->data.location = VARYING_SLOT_POS; diff --git a/src/amd/vulkan/radv_meta.h b/src/amd/vulkan/radv_meta.h index 6ba7b8d..7b50ed4 100644 --- a/src/amd/vulkan/radv_meta.h +++ b/src/amd/vulkan/radv_meta.h @@ -263,8 +263,7 @@ radv_is_dcc_decompress_pipeline(struct radv_cmd_buffer *cmd_buffer) nir_builder PRINTFLIKE(3, 4) radv_meta_init_shader(struct radv_device *dev, gl_shader_stage stage, const char *name, ...); -nir_ssa_def *radv_meta_gen_rect_vertices(nir_builder *vs_b); -nir_ssa_def *radv_meta_gen_rect_vertices_comp2(nir_builder *vs_b, nir_ssa_def *comp2); + nir_shader *radv_meta_build_nir_vs_generate_vertices(struct radv_device *dev); nir_shader *radv_meta_build_nir_fs_noop(struct radv_device *dev); diff --git a/src/amd/vulkan/radv_meta_blit.c b/src/amd/vulkan/radv_meta_blit.c index 6205c01..b45cb27 100644 --- a/src/amd/vulkan/radv_meta_blit.c +++ b/src/amd/vulkan/radv_meta_blit.c @@ -48,7 +48,7 @@ build_nir_vertex_shader(struct radv_device *dev) tex_pos_out->data.location = VARYING_SLOT_VAR0; tex_pos_out->data.interpolation = INTERP_MODE_SMOOTH; - nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b); + nir_ssa_def *outvec = nir_gen_rect_vertices(&b, NULL, NULL); nir_store_var(&b, pos_out, outvec, 0xf); diff --git a/src/amd/vulkan/radv_meta_blit2d.c b/src/amd/vulkan/radv_meta_blit2d.c index 4c640ac..d7bdf71 100644 --- a/src/amd/vulkan/radv_meta_blit2d.c +++ b/src/amd/vulkan/radv_meta_blit2d.c @@ -395,7 +395,7 @@ build_nir_vertex_shader(struct radv_device *device) tex_pos_out->data.location = VARYING_SLOT_VAR0; tex_pos_out->data.interpolation = INTERP_MODE_SMOOTH; - nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b); + nir_ssa_def *outvec = nir_gen_rect_vertices(&b, NULL, NULL); nir_store_var(&b, pos_out, outvec, 0xf); nir_ssa_def *src_box = nir_load_push_constant(&b, 4, 32, nir_imm_int(&b, 0), .range = 16); diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index 1aa23c2..30a510d 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -55,7 +55,7 @@ build_color_shaders(struct radv_device *dev, struct nir_shader **out_vs, struct nir_store_var(&fs_b, fs_out_color, in_color_load, 0xf); - nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&vs_b); + nir_ssa_def *outvec = nir_gen_rect_vertices(&vs_b, NULL, NULL); nir_store_var(&vs_b, vs_out_pos, outvec, 0xf); const struct glsl_type *layer_type = glsl_int_type(); @@ -416,7 +416,7 @@ build_depthstencil_shader(struct radv_device *dev, struct nir_shader **out_vs, z = nir_load_push_constant(&vs_b, 1, 32, nir_imm_int(&vs_b, 0), .range = 4); } - nir_ssa_def *outvec = radv_meta_gen_rect_vertices_comp2(&vs_b, z); + nir_ssa_def *outvec = nir_gen_rect_vertices(&vs_b, z, NULL); nir_store_var(&vs_b, vs_out_pos, outvec, 0xf); const struct glsl_type *layer_type = glsl_int_type(); -- 2.7.4