From f8a8986b2df34e136bffbece4e1f01c5d9f96983 Mon Sep 17 00:00:00 2001 From: Zhuo Wang Date: Fri, 28 Jun 2019 13:04:57 +0800 Subject: [PATCH] ethernet: g12b/A exphy,change default param [1/1] PD#SWPL-10391 Problem: g12b revA and revB need one code for two parameter Solution: dts set g12b revB parameter read chipversion,if g12b revA, change the parameter by default value Verify: verify on g12b w200 board,revA and revB Change-Id: I9cc4cd6c370207dce22dd0c7df51a6c71397e235 Signed-off-by: Zhuo Wang --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c index 3fe1544..4e5979f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c @@ -24,6 +24,7 @@ #include #include "dwmac1000.h" #include "dwmac_dma.h" +#include #endif #include "stmmac_platform.h" #include @@ -381,6 +382,13 @@ static void __iomem *g12a_network_interface_setup(struct platform_device *pdev) pr_debug("set exphy tx delay\n"); if (of_property_read_u32(np, "rx_delay", &external_rx_delay)) pr_debug("set exphy rx delay\n"); + if (is_meson_g12b_cpu()) { + if (is_meson_rev_a()) { + external_rx_delay = 0; + external_tx_delay = 0; + writel(0x1621, REG_ETH_reg0_addr); + } + } /* only exphy support wol since g12a*/ /*we enable/disable wol with item in dts with "wol=<1>"*/ if (of_property_read_u32(np, "wol", @@ -399,6 +407,12 @@ static void __iomem *g12a_network_interface_setup(struct platform_device *pdev) writel(cali_val, REG_ETH_reg0_addr + REG_ETH_REG1_OFFSET); + if (is_meson_g12b_cpu()) { + if (is_meson_rev_a()) { + writel(0x10000, REG_ETH_reg0_addr + + REG_ETH_REG1_OFFSET); + } + } pin_ctl = devm_pinctrl_get_select (&pdev->dev, "external_eth_pins"); return REG_ETH_reg0_addr; -- 2.7.4