From f81727d138b3b216c4db06ab8b01d67de6580525 Mon Sep 17 00:00:00 2001 From: Francis Visoiu Mistrih Date: Tue, 19 Dec 2017 21:47:14 +0000 Subject: [PATCH] [CodeGen] Move printing MO_BlockAddress operands to MachineOperand::print Work towards the unification of MIR and debug output by refactoring the interfaces. llvm-svn: 321113 --- llvm/include/llvm/CodeGen/MachineOperand.h | 3 ++ llvm/lib/CodeGen/MIRPrinter.cpp | 41 ++------------------------- llvm/lib/CodeGen/MachineOperand.cpp | 45 ++++++++++++++++++++++++++---- 3 files changed, 45 insertions(+), 44 deletions(-) diff --git a/llvm/include/llvm/CodeGen/MachineOperand.h b/llvm/include/llvm/CodeGen/MachineOperand.h index 258a235..4be7942 100644 --- a/llvm/include/llvm/CodeGen/MachineOperand.h +++ b/llvm/include/llvm/CodeGen/MachineOperand.h @@ -254,6 +254,9 @@ public: /// Print the offset with explicit +/- signs. static void printOperandOffset(raw_ostream &OS, int64_t Offset); + /// Print an IRSlotNumber. + static void printIRSlotNumber(raw_ostream &OS, int Slot); + /// Print the MachineOperand to \p os. /// Providing a valid \p TRI and \p IntrinsicInfo results in a more /// target-specific printing. If \p TRI and \p IntrinsicInfo are null, the diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp index 6b9da34..f91cca6 100644 --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -157,7 +157,6 @@ public: void print(const MachineBasicBlock &MBB); void print(const MachineInstr &MI); - void printIRBlockReference(const BasicBlock &BB); void printIRValueReference(const Value &V); void printStackObjectReference(int FrameIndex); void print(const MachineInstr &MI, unsigned OpIdx, @@ -704,32 +703,6 @@ void MIPrinter::print(const MachineInstr &MI) { } } -static void printIRSlotNumber(raw_ostream &OS, int Slot) { - if (Slot == -1) - OS << ""; - else - OS << Slot; -} - -void MIPrinter::printIRBlockReference(const BasicBlock &BB) { - OS << "%ir-block."; - if (BB.hasName()) { - printLLVMNameWithoutPrefix(OS, BB.getName()); - return; - } - const Function *F = BB.getParent(); - int Slot; - if (F == MST.getCurrentFunction()) { - Slot = MST.getLocalSlot(&BB); - } else { - ModuleSlotTracker CustomMST(F->getParent(), - /*ShouldInitializeAllMetadata=*/false); - CustomMST.incorporateFunction(*F); - Slot = CustomMST.getLocalSlot(&BB); - } - printIRSlotNumber(OS, Slot); -} - void MIPrinter::printIRValueReference(const Value &V) { if (isa(V)) { V.printAsOperand(OS, /*PrintType=*/false, MST); @@ -747,7 +720,7 @@ void MIPrinter::printIRValueReference(const Value &V) { printLLVMNameWithoutPrefix(OS, V.getName()); return; } - printIRSlotNumber(OS, MST.getLocalSlot(&V)); + MachineOperand::printIRSlotNumber(OS, MST.getLocalSlot(&V)); } void MIPrinter::printStackObjectReference(int FrameIndex) { @@ -786,7 +759,8 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, case MachineOperand::MO_MCSymbol: case MachineOperand::MO_CFIIndex: case MachineOperand::MO_IntrinsicID: - case MachineOperand::MO_Predicate: { + case MachineOperand::MO_Predicate: + case MachineOperand::MO_BlockAddress: { unsigned TiedOperandIdx = 0; if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef()) TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx); @@ -798,15 +772,6 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, case MachineOperand::MO_FrameIndex: printStackObjectReference(Op.getIndex()); break; - case MachineOperand::MO_BlockAddress: - OS << "blockaddress("; - Op.getBlockAddress()->getFunction()->printAsOperand(OS, /*PrintType=*/false, - MST); - OS << ", "; - printIRBlockReference(*Op.getBlockAddress()->getBasicBlock()); - OS << ')'; - MachineOperand::printOperandOffset(Op.getOffset()); - break; case MachineOperand::MO_RegisterMask: { auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask()); if (RegMaskInfo != RegisterMaskIds.end()) diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index fee99c9..ec81c63 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -417,6 +417,29 @@ static void printCFIRegister(unsigned DwarfReg, raw_ostream &OS, OS << printReg(Reg, TRI); } +static void printIRBlockReference(raw_ostream &OS, const BasicBlock &BB, + ModuleSlotTracker &MST) { + OS << "%ir-block."; + if (BB.hasName()) { + printLLVMNameWithoutPrefix(OS, BB.getName()); + return; + } + Optional Slot; + if (const Function *F = BB.getParent()) { + if (F == MST.getCurrentFunction()) { + Slot = MST.getLocalSlot(&BB); + } else if (const Module *M = F->getParent()) { + ModuleSlotTracker CustomMST(M, /*ShouldInitializeAllMetadata=*/false); + CustomMST.incorporateFunction(*F); + Slot = CustomMST.getLocalSlot(&BB); + } + } + if (Slot) + MachineOperand::printIRSlotNumber(OS, *Slot); + else + OS << ""; +} + void MachineOperand::printSubregIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI) { OS << "%subreg."; @@ -505,6 +528,13 @@ void MachineOperand::printOperandOffset(raw_ostream &OS, int64_t Offset) { OS << " + " << Offset; } +void MachineOperand::printIRSlotNumber(raw_ostream &OS, int Slot) { + if (Slot == -1) + OS << ""; + else + OS << Slot; +} + static void printCFI(raw_ostream &OS, const MCCFIInstruction &CFI, const TargetRegisterInfo *TRI) { switch (CFI.getOperation()) { @@ -731,13 +761,16 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, printOperandOffset(OS, getOffset()); break; } - case MachineOperand::MO_BlockAddress: - OS << '<'; - getBlockAddress()->printAsOperand(OS, /*PrintType=*/false, MST); - if (getOffset()) - OS << "+" << getOffset(); - OS << '>'; + case MachineOperand::MO_BlockAddress: { + OS << "blockaddress("; + getBlockAddress()->getFunction()->printAsOperand(OS, /*PrintType=*/false, + MST); + OS << ", "; + printIRBlockReference(OS, *getBlockAddress()->getBasicBlock(), MST); + OS << ')'; + MachineOperand::printOperandOffset(OS, getOffset()); break; + } case MachineOperand::MO_RegisterMask: { OS << "