From f7effef8d6e38d7d3120c604ad7d0b299b349e14 Mon Sep 17 00:00:00 2001 From: Chunming Zhou Date: Mon, 27 Mar 2017 11:43:35 +0800 Subject: [PATCH] drm/amdgpu: limit block size to one page MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Chunming Zhou Reviewed-by: Christian König Reviewed-by: Junwei Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 4bf9805..abb51bd 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -1042,6 +1042,14 @@ static bool amdgpu_check_pot_argument(int arg) static void amdgpu_get_block_size(struct amdgpu_device *adev) { + /* from AI, asic starts to support multiple level VMPT */ + if (adev->family >= AMDGPU_FAMILY_AI) { + if (amdgpu_vm_block_size != 9) + dev_warn(adev->dev, "Multi-VMPT limits block size to" + "one page!\n"); + amdgpu_vm_block_size = 9; + return; + } /* defines number of bits in page table versus page directory, * a page is 4KB so we have 12 bits offset, minimum 9 bits in the * page table and the remaining bits are in the page directory */ -- 2.7.4