From f7ac30b042dc9c9383e102fb54431c664c281d0d Mon Sep 17 00:00:00 2001 From: Martyn Welch Date: Thu, 11 Jun 2020 18:53:50 +0100 Subject: [PATCH] Fix MMC access on Sabrelite It appears that MMC access on the Sabrelite has been broken since cdcaee9518: Loading Environment from MMC... Card did not respond to voltage select! *** Warning - No block device, using default environment Remove the board_mmc_init() and related entries now that we should be using DM_MMC, add PINCTRL so that things work as expected. Signed-off-by: Martyn Welch Reviewed-by: Jaehoon Chung Reviewed-by: Fabio Estevam Tested-by: Troy Kisky Acked-by: Troy Kisky --- board/boundary/nitrogen6x/nitrogen6x.c | 72 ---------------------------------- configs/mx6qsabrelite_defconfig | 3 ++ 2 files changed, 3 insertions(+), 72 deletions(-) diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index d49725d..b3b121b 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include @@ -161,26 +160,6 @@ static iomux_v3_cfg_t const usdhc2_pads[] = { IOMUX_PAD_CTRL(SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL), }; -static iomux_v3_cfg_t const usdhc3_pads[] = { - IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, NO_PAD_CTRL), /* CD */ -}; - -static iomux_v3_cfg_t const usdhc4_pads[] = { - IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, NO_PAD_CTRL), /* CD */ -}; - static iomux_v3_cfg_t const enet_pads1[] = { IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, ENET_PAD_CTRL), IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, ENET_PAD_CTRL), @@ -305,57 +284,6 @@ int board_ehci_power(int port, int on) #endif -#ifdef CONFIG_FSL_ESDHC_IMX -static struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC3_BASE_ADDR}, - {USDHC4_BASE_ADDR}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? IMX_GPIO_NR(7, 0) : - IMX_GPIO_NR(2, 6); - - gpio_direction_input(gp_cd); - return !gpio_get_value(gp_cd); -} - -int board_mmc_init(bd_t *bis) -{ - int ret; - u32 index = 0; - - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - - usdhc_cfg[0].max_bus_width = 4; - usdhc_cfg[1].max_bus_width = 4; - - for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { - switch (index) { - case 0: - SETUP_IOMUX_PADS(usdhc3_pads); - break; - case 1: - SETUP_IOMUX_PADS(usdhc4_pads); - break; - default: - printf("Warning: you configured more USDHC controllers" - "(%d) then supported by the board (%d)\n", - index + 1, CONFIG_SYS_FSL_USDHC_NUM); - return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); - if (ret) - return ret; - } - - return 0; -} -#endif - #ifdef CONFIG_MXC_SPI int board_spi_cs_gpio(unsigned bus, unsigned cs) { diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index ea338c1..39b0ef7 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +# CONFIG_CMD_PINMUX is not set CONFIG_CMD_SATA=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y @@ -55,6 +56,8 @@ CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_MXC_SPI=y -- 2.7.4