From f6d8a31440c523de15f88a186b9e6daacab17054 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Sat, 4 Jan 2014 22:15:49 +0000 Subject: [PATCH] target-arm: A64: Add support for dumping AArch64 VFP register state When dumping the current CPU state, we can also get a request to dump the FPU state along with the CPU's integer state. Add support to dump the VFP state when that flag is set, so that we can properly debug code that modifies floating point registers. Signed-off-by: Alexander Graf [WN: Commit message tweak, rebased. Output all registers, two per-line.] Signed-off-by: Will Newton Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target-arm/translate-a64.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 40c6fc4..326f36d 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -119,6 +119,22 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, psr & PSTATE_C ? 'C' : '-', psr & PSTATE_V ? 'V' : '-'); cpu_fprintf(f, "\n"); + + if (flags & CPU_DUMP_FPU) { + int numvfpregs = 32; + for (i = 0; i < numvfpregs; i += 2) { + uint64_t vlo = float64_val(env->vfp.regs[i * 2]); + uint64_t vhi = float64_val(env->vfp.regs[(i * 2) + 1]); + cpu_fprintf(f, "q%02d=%016" PRIx64 ":%016" PRIx64 " ", + i, vhi, vlo); + vlo = float64_val(env->vfp.regs[(i + 1) * 2]); + vhi = float64_val(env->vfp.regs[((i + 1) * 2) + 1]); + cpu_fprintf(f, "q%02d=%016" PRIx64 ":%016" PRIx64 "\n", + i + 1, vhi, vlo); + } + cpu_fprintf(f, "FPCR: %08x FPSR: %08x\n", + vfp_get_fpcr(env), vfp_get_fpsr(env)); + } } static int get_mem_index(DisasContext *s) -- 2.7.4