From f6d0fa3d3366e5a91b10ace93eeb61aae9812317 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 31 Jul 2009 18:28:05 +0000 Subject: [PATCH] - Teach TBB / TBH offset limits are 510 and 131070 respectively since the offset is scaled by two. - Teach GetInstSizeInBytes about TBB and TBH. llvm-svn: 77701 --- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 11 ++++++++--- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 12 ++++++------ 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 89127ed..471da05 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -446,9 +446,14 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { case ARM::BR_JTr: case ARM::BR_JTm: case ARM::BR_JTadd: - case ARM::t2BR_JT: { + case ARM::t2BR_JT: + case ARM::t2TBB: + case ARM::t2TBH: { // These are jumptable branches, i.e. a branch followed by an inlined - // jumptable. The size is 4 + 4 * number of entries. + // jumptable. The size is 4 + 4 * number of entries. For TBB, each + // entry is one byte; TBH two byte each. + unsigned EntrySize = (MI->getOpcode() == ARM::t2TBB) + ? 1 : ((MI->getOpcode() == ARM::t2TBH) ? 2 : 4); unsigned NumOps = TID.getNumOperands(); MachineOperand JTOP = MI->getOperand(NumOps - (TID.isPredicable() ? 3 : 2)); @@ -463,7 +468,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { // FIXME: If we know the size of the function is less than (1 << 16) *2 // bytes, we can use 16-bit entries instead. Then there won't be an // alignment issue. - return getNumJTEntries(JT, JTI) * 4 + (IsThumb1JT ? 2 : 4); + return getNumJTEntries(JT, JTI) * EntrySize + (IsThumb1JT ? 2 : 4); } default: // Otherwise, pseudo-instruction sizes are zero. diff --git a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp index bc9e11b..bf2784a 100644 --- a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -237,10 +237,10 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &MF) { // the numbers agree with the position of the block in the function. MF.RenumberBlocks(); - // Thumb1 functions containing constant pools get 2-byte alignment. + // Thumb1 functions containing constant pools get 4-byte alignment. // This is so we can keep exact track of where the alignment padding goes. - // Set default. Thumb1 function is 1-byte aligned, ARM and Thumb2 are 2-byte + // Set default. Thumb1 function is 2-byte aligned, ARM and Thumb2 are 4-byte // aligned. AFI->setAlign(isThumb1 ? 1U : 2U); @@ -1360,10 +1360,9 @@ bool ARMConstantIslands::OptimizeThumb2JumpTables(MachineFunction &MF) { unsigned DstOffset = BBOffsets[MBB->getNumber()]; // Negative offset is not ok. FIXME: We should change BB layout to make // sure all the branches are forward. - if (ByteOk && !OffsetIsInRange(JTOffset, DstOffset, (1<<8)-1, false)) + if (ByteOk && (DstOffset - JTOffset) > ((1<<8)-1)*2) ByteOk = false; - if (HalfWordOk && - !OffsetIsInRange(JTOffset, DstOffset, (1<<16)-1, false)) + if (HalfWordOk && (DstOffset - JTOffset) > ((1<<16)-1)*2) HalfWordOk = false; if (!ByteOk && !HalfWordOk) break; @@ -1415,7 +1414,8 @@ bool ARMConstantIslands::OptimizeThumb2JumpTables(MachineFunction &MF) { .addReg(IdxReg, getKillRegState(IdxRegKill)) .addJumpTableIndex(JTI, JTOP.getTargetFlags()) .addImm(MI->getOperand(JTOpIdx+1).getImm())); - + // FIXME: Insert an "ALIGN" instruction to ensure the next instruction + // is 2-byte aligned. For now, asm printer will fix it up. AddrMI->eraseFromParent(); if (LeaMI) LeaMI->eraseFromParent(); -- 2.7.4