From f63b64c0c3b486f164c3c66cce9f13df2bac6b6e Mon Sep 17 00:00:00 2001 From: Puyan Lotfi Date: Mon, 16 Dec 2019 13:23:03 -0500 Subject: [PATCH] [llvm][MIRVRegNamerUtils] Adding hashing on CImm / FPImm MachineOperands. This patch makes it so that cases where multiple instructions that differ only in their ConstantInt or ConstantFP MachineOperand values no longer collide. For instance: %0:_(s1) = G_CONSTANT i1 true %1:_(s1) = G_CONSTANT i1 false %2:_(s32) = G_FCONSTANT float 1.0 %3:_(s32) = G_FCONSTANT float 0.0 Prior to this patch the first two instructions would collide together. Also, the last two G_FCONSTANT instructions would also collide. Now they will no longer collide. Differential Revision: https://reviews.llvm.org/D71558 --- llvm/lib/CodeGen/MIRVRegNamerUtils.cpp | 9 +++++++-- llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir | 14 ++++++++++++++ 2 files changed, 21 insertions(+), 2 deletions(-) create mode 100644 llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir diff --git a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp index fa36a11..4467076 100644 --- a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp +++ b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp @@ -53,6 +53,13 @@ std::string VRegRenamer::getInstructionOpcodeHash(MachineInstr &MI) { // Gets a hashable artifact from a given MachineOperand (ie an unsigned). auto GetHashableMO = [this](const MachineOperand &MO) -> unsigned { switch (MO.getType()) { + case MachineOperand::MO_CImmediate: + return hash_combine(MO.getType(), MO.getTargetFlags(), + MO.getCImm()->getZExtValue()); + case MachineOperand::MO_FPImmediate: + return hash_combine( + MO.getType(), MO.getTargetFlags(), + MO.getFPImm()->getValueAPF().bitcastToAPInt().getZExtValue()); case MachineOperand::MO_Immediate: return MO.getImm(); case MachineOperand::MO_TargetIndex: @@ -70,8 +77,6 @@ std::string VRegRenamer::getInstructionOpcodeHash(MachineInstr &MI) { // TODO: Handle the following Immediate/Index/ID/Predicate cases. They can // be hashed on in a stable manner. - case MachineOperand::MO_CImmediate: - case MachineOperand::MO_FPImmediate: case MachineOperand::MO_FrameIndex: case MachineOperand::MO_ConstantPoolIndex: case MachineOperand::MO_JumpTableIndex: diff --git a/llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir b/llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir new file mode 100644 index 0000000..2202c74 --- /dev/null +++ b/llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir @@ -0,0 +1,14 @@ +# RUN: llc -run-pass mir-canonicalizer -o - %s | FileCheck %s +--- +name: cimm_fpimm_hash_test +body: | + bb.0: + ; CHECK: _1:_(s1) = G_CONSTANT i1 true + ; CHECK: _1:_(s1) = G_CONSTANT i1 false + ; CHECK: _1:_(s32) = G_FCONSTANT float + ; CHECK: _1:_(s32) = G_FCONSTANT float + %0:_(s1) = G_CONSTANT i1 true + %1:_(s1) = G_CONSTANT i1 false + %2:_(s32) = G_FCONSTANT float 1.0 + %3:_(s32) = G_FCONSTANT float 0.0 +... -- 2.7.4