From f62fce356bf1df27e01fc40a3a277fc924019ee7 Mon Sep 17 00:00:00 2001 From: Yao Qi Date: Wed, 27 May 2015 11:08:40 +0100 Subject: [PATCH] [aarch64] Handle unknown instruction encoding We see the following build error: gdb/aarch64-tdep.c: In function 'aarch64_process_record': gdb/aarch64-tdep.c:2823:17: error: 'record_buf[0]' may be used uninitialized in this function [-Werror=maybe-uninitialized] memcpy(®S[0], &RECORD_BUF[0], sizeof(uint32_t)*LENGTH); \ ^ gdb/aarch64-tdep.c:3529:12: note: 'record_buf[0]' was declared here uint32_t record_buf[2]; since record_buf[0] isn't initialized in some paths in which instruction encodings doesn't exist in current ARMv8 reference manual. This patch is to let the function return AARCH64_RECORD_UNKNOWN for these paths. gdb: 2015-05-27 Yao Qi * aarch64-tdep.c (aarch64_record_data_proc_simd_fp): Return AARCH64_RECORD_UNKNOWN for unknown instruction encoding. --- gdb/ChangeLog | 5 +++++ gdb/aarch64-tdep.c | 8 +++++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 3f3d2eb..9455492 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,10 @@ 2015-05-27 Yao Qi + * aarch64-tdep.c (aarch64_record_data_proc_simd_fp): Return + AARCH64_RECORD_UNKNOWN for unknown instruction encoding. + +2015-05-27 Yao Qi + * aarch64-tdep.c (aarch64_record_branch_except_sys): Split lines before operator &&. (aarch64_record_load_store): Likewise. diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 8f1c7ef..9650a7a 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -3592,7 +3592,7 @@ aarch64_record_data_proc_simd_fp (insn_decode_record *aarch64_insn_r) record_buf[0] = AARCH64_CPSR_REGNUM; } /* Floating point - integer conversions instructions. */ - if (insn_bits12_15 == 0x00) + else if (insn_bits12_15 == 0x00) { /* Convert float to integer instruction. */ if (!(opcode >> 1) || ((opcode >> 1) == 0x02 && !rmode)) @@ -3621,8 +3621,14 @@ aarch64_record_data_proc_simd_fp (insn_decode_record *aarch64_insn_r) else record_buf[0] = reg_rd + AARCH64_V0_REGNUM; } + else + return AARCH64_RECORD_UNKNOWN; } + else + return AARCH64_RECORD_UNKNOWN; } + else + return AARCH64_RECORD_UNKNOWN; } else if ((insn_bits28_31 & 0x09) == 0x00 && insn_bits24_27 == 0x0e) { -- 2.7.4