From f5c9ea10921f63acfd0fe9e322efbcc960c97f4d Mon Sep 17 00:00:00 2001 From: sirl Date: Thu, 6 Sep 2001 18:12:53 +0000 Subject: [PATCH] 2001-09-06 Franz Sirl * config/rs6000/rs6000.c (rs6000_emit_prologue): Fix DWARF2 register number used for CR register. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@45444 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 5 +++++ gcc/config/rs6000/rs6000.c | 5 +++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b5bb57a..7c49298 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2001-09-06 Franz Sirl + + * config/rs6000/rs6000.c (rs6000_emit_prologue): Fix DWARF2 register + number used for CR register. + Thu Sep 6 11:16:35 2001 Jeffrey A Law (law@cygnus.com) Joern Rennecke (amylaar@cygnus.com) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index dcd2c32..a598f18 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -6401,9 +6401,10 @@ rs6000_emit_prologue () to understand '(unspec:SI [(reg:CC 68) ...] 19)'. But that's OK. All we have to do is specify that _one_ condition code register is saved in this stack slot. The thrower's epilogue - will then restore all the call-saved registers. */ + will then restore all the call-saved registers. + We use CR2_REGNO (70) to be compatible with gcc-2.95 on Linux. */ rs6000_frame_related (insn, frame_ptr_rtx, info->total_size, - cr_save_rtx, gen_rtx_REG (SImode, CR0_REGNO)); + cr_save_rtx, gen_rtx_REG (SImode, CR2_REGNO)); } /* Update stack and set back pointer unless this is V.4, -- 2.7.4