From f57ac3bd224bf34b97f228d23454c03e6b4860cd Mon Sep 17 00:00:00 2001 From: Chandler Carruth Date: Tue, 9 Dec 2014 14:25:55 +0000 Subject: [PATCH] [x86] Fix the test to actually test things for the CPU names, add the missing barcelona CPU which that test uncovered, and remove the 32-bit x86 CPUs which I really wasn't prepared to audit and test thoroughly. If anyone wants to clean up the 32-bit only x86 CPUs, go for it. Also, if anyone else wants to try to de-duplicate the AMD CPUs, that'd be cool, but from the looks of it wouldn't save as much as it did for the Intel CPUs. llvm-svn: 223774 --- llvm/lib/Target/X86/X86.td | 4 +++ llvm/test/CodeGen/X86/cpus.ll | 60 ++++++++++++++++++++----------------------- 2 files changed, 32 insertions(+), 32 deletions(-) diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td index 88f831d..0bb597b 100644 --- a/llvm/lib/Target/X86/X86.td +++ b/llvm/lib/Target/X86/X86.td @@ -433,6 +433,10 @@ def : Proc<"amdfam10", [FeatureSSE4A, Feature3DNowA, FeatureCMPXCHG16B, FeatureLZCNT, FeaturePOPCNT, FeatureSlowBTMem, FeatureSlowSHLD]>; +def : Proc<"barcelona", [FeatureSSE4A, + Feature3DNowA, FeatureCMPXCHG16B, FeatureLZCNT, + FeaturePOPCNT, FeatureSlowBTMem, + FeatureSlowSHLD]>; // Bobcat def : Proc<"btver1", [FeatureSSSE3, FeatureSSE4A, FeatureCMPXCHG16B, FeaturePRFCHW, FeatureLZCNT, FeaturePOPCNT, diff --git a/llvm/test/CodeGen/X86/cpus.ll b/llvm/test/CodeGen/X86/cpus.ll index a7b4059..3351f7e 100644 --- a/llvm/test/CodeGen/X86/cpus.ll +++ b/llvm/test/CodeGen/X86/cpus.ll @@ -1,32 +1,28 @@ -; RUN: llc < %s -o /dev/null -mcpu=prescott -; RUN: llc < %s -o /dev/null -mcpu=nocona -; RUN: llc < %s -o /dev/null -mcpu=core2 -; RUN: llc < %s -o /dev/null -mcpu=penryn -; RUN: llc < %s -o /dev/null -mcpu=nehalem -; RUN: llc < %s -o /dev/null -mcpu=westmere -; RUN: llc < %s -o /dev/null -mcpu=sandybridge -; RUN: llc < %s -o /dev/null -mcpu=ivybridge -; RUN: llc < %s -o /dev/null -mcpu=haswell -; RUN: llc < %s -o /dev/null -mcpu=broadwell -; RUN: llc < %s -o /dev/null -mcpu=bonnell -; RUN: llc < %s -o /dev/null -mcpu=silvermont -; RUN: llc < %s -o /dev/null -mcpu=k8 -; RUN: llc < %s -o /dev/null -mcpu=opteron -; RUN: llc < %s -o /dev/null -mcpu=athlon64 -; RUN: llc < %s -o /dev/null -mcpu=athlon-fx -; RUN: llc < %s -o /dev/null -mcpu=k8-sse3 -; RUN: llc < %s -o /dev/null -mcpu=opteron-sse3 -; RUN: llc < %s -o /dev/null -mcpu=athlon64-sse3 -; RUN: llc < %s -o /dev/null -mcpu=amdfam10 -; RUN: llc < %s -o /dev/null -mcpu=barcelona -; RUN: llc < %s -o /dev/null -mcpu=bdver1 -; RUN: llc < %s -o /dev/null -mcpu=bdver2 -; RUN: llc < %s -o /dev/null -mcpu=bdver3 -; RUN: llc < %s -o /dev/null -mcpu=bdver4 -; RUN: llc < %s -o /dev/null -mcpu=btver1 -; RUN: llc < %s -o /dev/null -mcpu=btver2 -; RUN: llc < %s -o /dev/null -mcpu=winchip-c6 -; RUN: llc < %s -o /dev/null -mcpu=winchip2 -; RUN: llc < %s -o /dev/null -mcpu=c3 -; RUN: llc < %s -o /dev/null -mcpu=c3-2 -; RUN: llc < %s -o /dev/null -mcpu=geode +; Test that the CPU names work. +; +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nocona 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core2 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=penryn 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nehalem 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=westmere 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sandybridge 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=ivybridge 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=haswell 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=broadwell 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bonnell 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=silvermont 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-fx 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8-sse3 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron-sse3 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64-sse3 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=amdfam10 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=barcelona 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver1 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver2 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver3 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver4 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver1 2>&1 | count 0 +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver2 2>&1 | count 0 -- 2.7.4