From f521d500fcfe4be65d4d00784633d504a635ae17 Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu Date: Thu, 30 Nov 2017 15:42:22 +0100 Subject: [PATCH] [ARC] Add trap instruction. 2017-11-07 Claudiu Zissulescu * config/arc/arc.md (trap): New pattern. From-SVN: r255276 --- gcc/ChangeLog | 4 ++++ gcc/config/arc/arc.md | 7 +++++++ 2 files changed, 11 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ae502ca..aee1325 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,9 @@ 2017-11-30 Claudiu Zissulescu + * config/arc/arc.md (trap): New pattern. + +2017-11-30 Claudiu Zissulescu + * config/arc/arc.c (hwloop_optimize): Prevent the last ZOL instruction to end into a delay slot. * config/arc/arc.md (cond_delay_insn): Check if the instruction diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index b39f047..880327c 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -4301,6 +4301,13 @@ ; use it for lack of inter-procedural branch shortening. ; Link-time relaxation would help... +(define_insn "trap" + [(trap_if (const_int 1) (const_int 0))] + "!TARGET_ARC600_FAMILY" + "trap_s\\t5" + [(set_attr "type" "misc") + (set_attr "length" "2")]) + (define_insn "nop" [(const_int 0)] "" -- 2.7.4