From f502b14d40e751fe00afc493ef0d08f196524886 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 28 Nov 2020 12:28:22 -0800
Subject: [PATCH] [ARMAttributeParser] Correctly parse and print
 Tag_THUMB_ISA_use=3

I took the "Permitted"/"Not Permitted" combo from the `Tag_ARM_ISA_use` case (GNU tools print "Yes").

Reviewed By: compnerd, MaskRay, simon_tatham

Differential Revision: https://reviews.llvm.org/D90305
---
 llvm/lib/Support/ARMAttributeParser.cpp            |  2 +-
 .../MC/ARM/assembly-default-build-attributes.s     | 16 ++++++++++
 llvm/test/MC/ARM/directive-arch-armv8m.s           | 34 ++++++++++++++++++++++
 llvm/unittests/Support/ARMAttributeParser.cpp      |  4 +++
 4 files changed, 55 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/MC/ARM/directive-arch-armv8m.s

diff --git a/llvm/lib/Support/ARMAttributeParser.cpp b/llvm/lib/Support/ARMAttributeParser.cpp
index 17ad38d..4596919 100644
--- a/llvm/lib/Support/ARMAttributeParser.cpp
+++ b/llvm/lib/Support/ARMAttributeParser.cpp
@@ -113,7 +113,7 @@ Error ARMAttributeParser::ARM_ISA_use(AttrType tag) {
 }
 
 Error ARMAttributeParser::THUMB_ISA_use(AttrType tag) {
-  static const char *strings[] = {"Not Permitted", "Thumb-1", "Thumb-2"};
+  static const char *strings[] = {"Not Permitted", "Thumb-1", "Thumb-2", "Permitted"};
   return parseStringAttribute("THUMB_ISA_use", tag, makeArrayRef(strings));
 }
 
diff --git a/llvm/test/MC/ARM/assembly-default-build-attributes.s b/llvm/test/MC/ARM/assembly-default-build-attributes.s
index be63066..4048353 100644
--- a/llvm/test/MC/ARM/assembly-default-build-attributes.s
+++ b/llvm/test/MC/ARM/assembly-default-build-attributes.s
@@ -2,6 +2,8 @@
 // RUN: llvm-mc -triple armv6m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v6M
 // RUN: llvm-mc -triple armv7m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v7M
 // RUN: llvm-mc -triple armv7a -mcpu=cortex-a15 < %s -arm-add-build-attributes | FileCheck %s --check-prefix=Cortex-A15
+// RUN: llvm-mc -triple armv8m.base < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v8M_Baseline
+// RUN: llvm-mc -triple armv8m.main < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v8M_Mainline
 
 // This isn't intended to be a through check of the build attributes emitted
 // for each target (that's tested elsewhere), but just to check that the
@@ -30,6 +32,20 @@
 // v7M: .eabi_attribute 9, 2    @ Tag_THUMB_ISA_use
 // v7M: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
 
+// v8M_Baseline-NOT: .cpu
+// v8M_Baseline: .eabi_attribute 6, 16   @ Tag_CPU_arch
+// v8M_Baseline: .eabi_attribute 7, 77   @ Tag_CPU_arch_profile
+// v8M_Baseline: .eabi_attribute 8, 0    @ Tag_ARM_ISA_use
+// v8M_Baseline: .eabi_attribute 9, 3    @ Tag_THUMB_ISA_use
+// v8M_Baseline: .eabi_attribute 34, 0   @ Tag_CPU_unaligned_access
+
+// v8M_Mainline-NOT: .cpu
+// v8M_Mainline: .eabi_attribute 6, 17   @ Tag_CPU_arch
+// v8M_Mainline: .eabi_attribute 7, 77   @ Tag_CPU_arch_profile
+// v8M_Mainline: .eabi_attribute 8, 0    @ Tag_ARM_ISA_use
+// v8M_Mainline: .eabi_attribute 9, 3    @ Tag_THUMB_ISA_use
+// v8M_Mainline: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
+
 // Cortex-A15: .cpu    cortex-a15
 // Cortex-A15: .eabi_attribute 6, 10   @ Tag_CPU_arch
 // Cortex-A15: .eabi_attribute 7, 65   @ Tag_CPU_arch_profile
diff --git a/llvm/test/MC/ARM/directive-arch-armv8m.s b/llvm/test/MC/ARM/directive-arch-armv8m.s
new file mode 100644
index 0000000..5151b8f
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-arch-armv8m.s
@@ -0,0 +1,34 @@
+@ Test the .arch directive for armv8m
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv8-a architecture when using the armv8m.base alias.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj --arch-specific - | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv8m.base
+
+@ CHECK-ASM: 	.arch	armv8-m.base
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 8-M.Baseline
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v8
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch_profile
+@ CHECK-ATTR:     Description: Microcontroller
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/llvm/unittests/Support/ARMAttributeParser.cpp b/llvm/unittests/Support/ARMAttributeParser.cpp
index 88e3ce3..9a823ed 100644
--- a/llvm/unittests/Support/ARMAttributeParser.cpp
+++ b/llvm/unittests/Support/ARMAttributeParser.cpp
@@ -127,6 +127,10 @@ TEST(ThumbISABuildAttr, testBuildAttr) {
                                ARMBuildAttrs::Not_Allowed));
   EXPECT_TRUE(testBuildAttr(9, 1, ARMBuildAttrs::THUMB_ISA_use,
                                ARMBuildAttrs::Allowed));
+  EXPECT_TRUE(testBuildAttr(9, 2, ARMBuildAttrs::THUMB_ISA_use,
+                               ARMBuildAttrs::AllowThumb32));
+  EXPECT_TRUE(testBuildAttr(9, 3, ARMBuildAttrs::THUMB_ISA_use,
+                               ARMBuildAttrs::AllowThumbDerived));
 }
 
 TEST(FPArchBuildAttr, testBuildAttr) {
-- 
2.7.4