From f4a1e898c36d3de2a5feeaaea881a05ff512e905 Mon Sep 17 00:00:00 2001 From: Jiamin Ma Date: Sun, 4 Aug 2019 15:07:01 +0800 Subject: [PATCH] DTS: fix compile warnings [1/1] PD#SWPL-12245 Problem: Warning (resets_property): Missing property '#reset-cells' Solution: Add #reset-cells to node clock-controller Verify: P212 Change-Id: I5bc01ab88774be2088764ee6fb0eb9a863894ca2 Signed-off-by: Jiamin Ma --- arch/arm/boot/dts/amlogic/mesong12a.dtsi | 1 + arch/arm/boot/dts/amlogic/mesong12b.dtsi | 1 + arch/arm/boot/dts/amlogic/mesongxl.dtsi | 1 + arch/arm/boot/dts/amlogic/mesongxm.dtsi | 1 + arch/arm/boot/dts/amlogic/mesonsm1.dtsi | 1 + arch/arm/boot/dts/amlogic/mesontl1.dtsi | 1 + arch/arm/boot/dts/amlogic/mesontm2.dtsi | 1 + arch/arm/boot/dts/amlogic/mesontxl.dtsi | 1 + arch/arm/boot/dts/amlogic/mesontxlx.dtsi | 1 + arch/arm64/boot/dts/amlogic/mesong12a.dtsi | 1 + arch/arm64/boot/dts/amlogic/mesong12b.dtsi | 1 + arch/arm64/boot/dts/amlogic/mesongxl.dtsi | 1 + arch/arm64/boot/dts/amlogic/mesongxm.dtsi | 1 + arch/arm64/boot/dts/amlogic/mesonsm1.dtsi | 1 + arch/arm64/boot/dts/amlogic/mesontl1.dtsi | 1 + arch/arm64/boot/dts/amlogic/mesontm2.dtsi | 1 + arch/arm64/boot/dts/amlogic/mesontxl.dtsi | 1 + arch/arm64/boot/dts/amlogic/mesontxlx.dtsi | 1 + 18 files changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/amlogic/mesong12a.dtsi b/arch/arm/boot/dts/amlogic/mesong12a.dtsi index edab24b..df38838 100644 --- a/arch/arm/boot/dts/amlogic/mesong12a.dtsi +++ b/arch/arm/boot/dts/amlogic/mesong12a.dtsi @@ -668,6 +668,7 @@ aoclkc: clock-controller@0 { compatible = "amlogic,g12a-aoclkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x320>; }; diff --git a/arch/arm/boot/dts/amlogic/mesong12b.dtsi b/arch/arm/boot/dts/amlogic/mesong12b.dtsi index a78ebfb..39705e5 100644 --- a/arch/arm/boot/dts/amlogic/mesong12b.dtsi +++ b/arch/arm/boot/dts/amlogic/mesong12b.dtsi @@ -732,6 +732,7 @@ aoclkc: clock-controller@0 { compatible = "amlogic,g12b-aoclkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x320>; }; diff --git a/arch/arm/boot/dts/amlogic/mesongxl.dtsi b/arch/arm/boot/dts/amlogic/mesongxl.dtsi index 82a9668..2e7ad92 100644 --- a/arch/arm/boot/dts/amlogic/mesongxl.dtsi +++ b/arch/arm/boot/dts/amlogic/mesongxl.dtsi @@ -552,6 +552,7 @@ clkc: clock-controller@0 { compatible = "amlogic,gxl-clkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x3db>; }; }; diff --git a/arch/arm/boot/dts/amlogic/mesongxm.dtsi b/arch/arm/boot/dts/amlogic/mesongxm.dtsi index 0fe9914..79502d0 100644 --- a/arch/arm/boot/dts/amlogic/mesongxm.dtsi +++ b/arch/arm/boot/dts/amlogic/mesongxm.dtsi @@ -659,6 +659,7 @@ clkc: clock-controller@0 { compatible = "amlogic,gxl-clkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x3db>; }; }; diff --git a/arch/arm/boot/dts/amlogic/mesonsm1.dtsi b/arch/arm/boot/dts/amlogic/mesonsm1.dtsi index 1084425..d23bf41 100644 --- a/arch/arm/boot/dts/amlogic/mesonsm1.dtsi +++ b/arch/arm/boot/dts/amlogic/mesonsm1.dtsi @@ -666,6 +666,7 @@ aoclkc: clock-controller@0 { compatible = "amlogic,sm1-aoclkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x3dc>; }; diff --git a/arch/arm/boot/dts/amlogic/mesontl1.dtsi b/arch/arm/boot/dts/amlogic/mesontl1.dtsi index 3a76a4c..f65d300 100644 --- a/arch/arm/boot/dts/amlogic/mesontl1.dtsi +++ b/arch/arm/boot/dts/amlogic/mesontl1.dtsi @@ -630,6 +630,7 @@ clkc: clock-controller@0 { compatible = "amlogic,tl1-clkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x3fc>; }; };/* end of hiubus*/ diff --git a/arch/arm/boot/dts/amlogic/mesontm2.dtsi b/arch/arm/boot/dts/amlogic/mesontm2.dtsi index d754a7f..f687c7d 100644 --- a/arch/arm/boot/dts/amlogic/mesontm2.dtsi +++ b/arch/arm/boot/dts/amlogic/mesontm2.dtsi @@ -648,6 +648,7 @@ clkc: clock-controller@0 { compatible = "amlogic,tl1-clkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x3fc>; }; diff --git a/arch/arm/boot/dts/amlogic/mesontxl.dtsi b/arch/arm/boot/dts/amlogic/mesontxl.dtsi index a99892a9..1c876ec 100644 --- a/arch/arm/boot/dts/amlogic/mesontxl.dtsi +++ b/arch/arm/boot/dts/amlogic/mesontxl.dtsi @@ -592,6 +592,7 @@ aoclkc: clock-controller@0 { compatible = "amlogic,txl-aoclkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x1000>; }; diff --git a/arch/arm/boot/dts/amlogic/mesontxlx.dtsi b/arch/arm/boot/dts/amlogic/mesontxlx.dtsi index 3c862a2..b3665fc 100644 --- a/arch/arm/boot/dts/amlogic/mesontxlx.dtsi +++ b/arch/arm/boot/dts/amlogic/mesontxlx.dtsi @@ -807,6 +807,7 @@ aoclkc: clock-controller@0 { compatible = "amlogic,txlx-aoclkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x1000>; }; diff --git a/arch/arm64/boot/dts/amlogic/mesong12a.dtsi b/arch/arm64/boot/dts/amlogic/mesong12a.dtsi index 9f38793..c315acf 100644 --- a/arch/arm64/boot/dts/amlogic/mesong12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesong12a.dtsi @@ -668,6 +668,7 @@ aoclkc: clock-controller@0 { compatible = "amlogic,g12a-aoclkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x0 0x0 0x320>; }; diff --git a/arch/arm64/boot/dts/amlogic/mesong12b.dtsi b/arch/arm64/boot/dts/amlogic/mesong12b.dtsi index 4e620e5..043519c 100644 --- a/arch/arm64/boot/dts/amlogic/mesong12b.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesong12b.dtsi @@ -732,6 +732,7 @@ aoclkc: clock-controller@0 { compatible = "amlogic,g12b-aoclkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x0 0x0 0x320>; }; diff --git a/arch/arm64/boot/dts/amlogic/mesongxl.dtsi b/arch/arm64/boot/dts/amlogic/mesongxl.dtsi index 9e911c5..d1f4d043 100644 --- a/arch/arm64/boot/dts/amlogic/mesongxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesongxl.dtsi @@ -539,6 +539,7 @@ clkc: clock-controller@0 { compatible = "amlogic,gxl-clkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x0 0x0 0x3db>; }; }; diff --git a/arch/arm64/boot/dts/amlogic/mesongxm.dtsi b/arch/arm64/boot/dts/amlogic/mesongxm.dtsi index c41cf0f..5024439 100644 --- a/arch/arm64/boot/dts/amlogic/mesongxm.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesongxm.dtsi @@ -659,6 +659,7 @@ clkc: clock-controller@0 { compatible = "amlogic,gxl-clkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x0 0x0 0x3db>; }; }; diff --git a/arch/arm64/boot/dts/amlogic/mesonsm1.dtsi b/arch/arm64/boot/dts/amlogic/mesonsm1.dtsi index 8c195f0..6379e63 100644 --- a/arch/arm64/boot/dts/amlogic/mesonsm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesonsm1.dtsi @@ -666,6 +666,7 @@ aoclkc: clock-controller@0 { compatible = "amlogic,sm1-aoclkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x0 0x0 0x3dc>; }; diff --git a/arch/arm64/boot/dts/amlogic/mesontl1.dtsi b/arch/arm64/boot/dts/amlogic/mesontl1.dtsi index eb006f2..e6dc78a 100644 --- a/arch/arm64/boot/dts/amlogic/mesontl1.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesontl1.dtsi @@ -622,6 +622,7 @@ clkc: clock-controller@0 { compatible = "amlogic,tl1-clkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x0 0x0 0x3fc>; }; };/* end of hiubus*/ diff --git a/arch/arm64/boot/dts/amlogic/mesontm2.dtsi b/arch/arm64/boot/dts/amlogic/mesontm2.dtsi index d0c1aef..3f01bf7 100644 --- a/arch/arm64/boot/dts/amlogic/mesontm2.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesontm2.dtsi @@ -647,6 +647,7 @@ clkc: clock-controller@0 { compatible = "amlogic,tl1-clkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x0 0x0 0x3fc>; }; clkc1: clock-controller@1 { diff --git a/arch/arm64/boot/dts/amlogic/mesontxl.dtsi b/arch/arm64/boot/dts/amlogic/mesontxl.dtsi index 3bb1375..8d027c7 100644 --- a/arch/arm64/boot/dts/amlogic/mesontxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesontxl.dtsi @@ -592,6 +592,7 @@ aoclkc: clock-controller@0 { compatible = "amlogic,txl-aoclkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x0 0x0 0x1000>; }; diff --git a/arch/arm64/boot/dts/amlogic/mesontxlx.dtsi b/arch/arm64/boot/dts/amlogic/mesontxlx.dtsi index 0e3f4eb..93f453e 100644 --- a/arch/arm64/boot/dts/amlogic/mesontxlx.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesontxlx.dtsi @@ -807,6 +807,7 @@ aoclkc: clock-controller@0 { compatible = "amlogic,txlx-aoclkc"; #clock-cells = <1>; + #reset-cells = <1>; reg = <0x0 0x0 0x0 0x1000>; }; -- 2.7.4