From f4666f9bfe128eee749d37d9f3c3b0784f8a3510 Mon Sep 17 00:00:00 2001 From: yroux Date: Fri, 10 Oct 2014 09:18:40 +0000 Subject: [PATCH] Revert commit 216002 which introduced a regression. 2014-10-10 Yvan Roux Revert: 2014-10-08 Yvan Roux Backport from trunk r215206, r215207, r215208. 2014-09-12 Wilco Dijkstra * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table for A57. (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP cost to spilling from integer to FP registers. 2014-09-12 Wilco Dijkstra * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register move handling. (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves are now handled correctly. 2014-09-12 Wilco Dijkstra * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost handling of CALLER_SAVE_REGS and POINTER_REGS. git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216062 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog.linaro | 25 +++++++++++++++++++++++++ gcc/config/aarch64/aarch64.c | 38 +++++++------------------------------- 2 files changed, 32 insertions(+), 31 deletions(-) diff --git a/gcc/ChangeLog.linaro b/gcc/ChangeLog.linaro index 2a26d2e..5b94c30 100644 --- a/gcc/ChangeLog.linaro +++ b/gcc/ChangeLog.linaro @@ -1,3 +1,28 @@ +2014-10-10 Yvan Roux + + Revert: + 2014-10-08 Yvan Roux + + Backport from trunk r215206, r215207, r215208. + 2014-09-12 Wilco Dijkstra + + * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table + for A57. + (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP + cost to spilling from integer to FP registers. + + 2014-09-12 Wilco Dijkstra + + * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register + move handling. + (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves + are now handled correctly. + + 2014-09-12 Wilco Dijkstra + + * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost + handling of CALLER_SAVE_REGS and POINTER_REGS. + 2014-10-08 Yvan Roux Backport from trunk r214825, r214826. diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index e6e6903..6c6fcfb 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -218,27 +218,10 @@ static const struct cpu_regmove_cost generic_regmove_cost = NAMED_PARAM (GP2GP, 1), NAMED_PARAM (GP2FP, 2), NAMED_PARAM (FP2GP, 2), - NAMED_PARAM (FP2FP, 2) -}; - -static const struct cpu_regmove_cost cortexa57_regmove_cost = -{ - NAMED_PARAM (GP2GP, 1), - /* Avoid the use of slow int<->fp moves for spilling by setting - their cost higher than memmov_cost. */ - NAMED_PARAM (GP2FP, 5), - NAMED_PARAM (FP2GP, 5), - NAMED_PARAM (FP2FP, 2) -}; - -static const struct cpu_regmove_cost cortexa53_regmove_cost = -{ - NAMED_PARAM (GP2GP, 1), - /* Avoid the use of slow int<->fp moves for spilling by setting - their cost higher than memmov_cost. */ - NAMED_PARAM (GP2FP, 5), - NAMED_PARAM (FP2GP, 5), - NAMED_PARAM (FP2FP, 2) + /* We currently do not provide direct support for TFmode Q->Q move. + Therefore we need to raise the cost above 2 in order to have + reload handle the situation. */ + NAMED_PARAM (FP2FP, 4) }; /* Generic costs for vector insn classes. */ @@ -298,7 +281,7 @@ static const struct tune_params cortexa53_tunings = { &cortexa53_extra_costs, &generic_addrcost_table, - &cortexa53_regmove_cost, + &generic_regmove_cost, &generic_vector_cost, NAMED_PARAM (memmov_cost, 4), NAMED_PARAM (issue_rate, 2) @@ -308,7 +291,7 @@ static const struct tune_params cortexa57_tunings = { &cortexa57_extra_costs, &cortexa57_addrcost_table, - &cortexa57_regmove_cost, + &generic_regmove_cost, &cortexa57_vector_cost, NAMED_PARAM (memmov_cost, 4), NAMED_PARAM (issue_rate, 3) @@ -5910,13 +5893,6 @@ aarch64_register_move_cost (enum machine_mode mode, const struct cpu_regmove_cost *regmove_cost = aarch64_tune_params->regmove_cost; - /* Caller save and pointer regs are equivalent to GENERAL_REGS. */ - if (to == CALLER_SAVE_REGS || to == POINTER_REGS) - to = GENERAL_REGS; - - if (from == CALLER_SAVE_REGS || from == POINTER_REGS) - from = GENERAL_REGS; - /* Moving between GPR and stack cost is the same as GP2GP. */ if ((from == GENERAL_REGS && to == STACK_REG) || (to == GENERAL_REGS && from == STACK_REG)) @@ -5939,7 +5915,7 @@ aarch64_register_move_cost (enum machine_mode mode, secondary reload. A general register is used as a scratch to move the upper DI value and the lower DI value is moved directly, hence the cost is the sum of three moves. */ - if (! TARGET_SIMD && GET_MODE_SIZE (mode) == 16) + if (! TARGET_SIMD && GET_MODE_SIZE (mode) == 128) return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP; return regmove_cost->FP2FP; -- 2.7.4