From f44b717c3d6908ac6590a1193a07c920d05e5a1d Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 18 May 2016 12:04:47 +0300 Subject: [PATCH] drm/omap: add comments for PLL calculations Add comments showing how the PLL clock rates are calculated. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/omapdrm/dss/pll.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/omapdrm/dss/pll.c b/drivers/gpu/drm/omapdrm/dss/pll.c index 6daf7bc..4768a85 100644 --- a/drivers/gpu/drm/omapdrm/dss/pll.c +++ b/drivers/gpu/drm/omapdrm/dss/pll.c @@ -207,6 +207,10 @@ bool dss_pll_hsdiv_calc_a(const struct dss_pll *pll, unsigned long clkdco, return false; } +/* + * clkdco = clkin / n * m * 2 + * clkoutX = clkdco / mX + */ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin, unsigned long pll_min, unsigned long pll_max, dss_pll_calc_func func, void *data) @@ -252,6 +256,9 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin, * This calculates a PLL config that will provide the target_clkout rate * for clkout. Additionally clkdco rate will be the same as clkout rate * when clkout rate is >= min_clkdco. + * + * clkdco = clkin / n * m + clkin / n * mf / 262144 + * clkout = clkdco / m2 */ bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin, unsigned long target_clkout, struct dss_pll_clock_info *cinfo) -- 2.7.4