From f3f115bfb176abb799f792d3e75fbdc4754b8b40 Mon Sep 17 00:00:00 2001 From: Nian Jing Date: Wed, 3 Jan 2018 21:06:19 +0800 Subject: [PATCH] cvbs: cvbs bring up for g12a PD#156734: cvbs bring up for g12a Change-Id: I8a69d85a921e78300db9ec96c2f93807f6f139b4 Signed-off-by: Nian Jing --- arch/arm64/boot/dts/amlogic/g12a_pxp.dts | 29 ++++++++++++ arch/arm64/boot/dts/amlogic/g12a_skt.dts | 21 +++++++++ drivers/amlogic/media/vout/cvbs/cvbs_log.h | 31 +++++++++++++ drivers/amlogic/media/vout/cvbs/cvbs_out.c | 58 +++++++++++++++++------- drivers/amlogic/media/vout/cvbs/cvbs_out.h | 39 +++------------- drivers/amlogic/media/vout/cvbs/cvbs_out_reg.h | 4 ++ drivers/amlogic/media/vout/cvbs/enc_clk_config.c | 48 +++++++++++++------- drivers/amlogic/media/vout/cvbs/enc_clk_config.h | 1 + drivers/amlogic/media/vout/vdac/vdac_dev.c | 33 +++++++++++--- 9 files changed, 191 insertions(+), 73 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/g12a_pxp.dts b/arch/arm64/boot/dts/amlogic/g12a_pxp.dts index 2ca1717..d3a3654 100644 --- a/arch/arm64/boot/dts/amlogic/g12a_pxp.dts +++ b/arch/arm64/boot/dts/amlogic/g12a_pxp.dts @@ -134,6 +134,35 @@ }; }; + vdac { + compatible = "amlogic, vdac"; + dev_name = "vdac"; + status = "okay"; + }; + + cvbsout { + compatible = "amlogic, cvbsout-g12a"; + dev_name = "cvbsout"; + status = "okay"; + clocks = <&clkc CLKID_VCLK2_ENCI + &clkc CLKID_VCLK2_VENCI0 + &clkc CLKID_VCLK2_VENCI1 + &clkc CLKID_DAC_CLK>; + clock-names = "venci_top_gate", + "venci_0_gate", + "venci_1_gate", + "vdac_clk_gate"; + + /* performance: reg_address, reg_value */ + /* s905x */ + performance = <0x1bf0 0x9 + 0x1b56 0x343 + 0x1b12 0x8080 + 0x1b05 0xfd + 0x1c59 0xf752 + 0xffff 0x0>; /* ending flag */ + }; + sd_emmc_b:sd@ffe05000 { status = "okay"; compatible = "amlogic, meson-mmc-g12a"; diff --git a/arch/arm64/boot/dts/amlogic/g12a_skt.dts b/arch/arm64/boot/dts/amlogic/g12a_skt.dts index 8f9364b..e81cf6c 100644 --- a/arch/arm64/boot/dts/amlogic/g12a_skt.dts +++ b/arch/arm64/boot/dts/amlogic/g12a_skt.dts @@ -136,6 +136,27 @@ }; }; + vdac { + compatible = "amlogic, vdac"; + dev_name = "vdac"; + status = "okay"; + }; + + cvbsout { + compatible = "amlogic, cvbsout-g12a"; + dev_name = "cvbsout"; + status = "okay"; + + /* performance: reg_address, reg_value */ + /* s905x */ + performance = <0x1bf0 0x9 + 0x1b56 0x343 + 0x1b12 0x8080 + 0x1b05 0xfd + 0x1c59 0xf752 + 0xffff 0x0>; /* ending flag */ + }; + bt-dev{ compatible = "amlogic, bt-dev"; dev_name = "bt-dev"; diff --git a/drivers/amlogic/media/vout/cvbs/cvbs_log.h b/drivers/amlogic/media/vout/cvbs/cvbs_log.h index 0f34fdc..25f248a 100644 --- a/drivers/amlogic/media/vout/cvbs/cvbs_log.h +++ b/drivers/amlogic/media/vout/cvbs/cvbs_log.h @@ -33,4 +33,35 @@ #define cvbs_log_dbg(fmt, ...) \ pr_warn(fmt, ##__VA_ARGS__) +ssize_t show_info(char *name, char *buf); +inline ssize_t show_info(char *name, char *buf) +{ + return snprintf(buf, 40, "%s\n", name); +} + +#define STORE_INFO(name) \ + {mutex_lock(&cvbs_mutex); \ + snprintf(name, 40, "%s", buf); \ + mutex_unlock(&cvbs_mutex); } + +#define SET_CVBS_CLASS_ATTR(name, op) \ +static char name[40]; \ +static ssize_t aml_CVBS_attr_##name##_show(struct class *cla, \ + struct class_attribute *attr, char *buf) \ +{ \ + return show_info(name, buf); \ +} \ +static ssize_t aml_CVBS_attr_##name##_store(struct class *cla, \ + struct class_attribute *attr, \ + const char *buf, size_t count) \ +{ \ + STORE_INFO(name); \ + op(name); \ + return strnlen(buf, count); \ +} \ +struct class_attribute class_CVBS_attr_##name = \ +__ATTR(name, 0644, \ + aml_CVBS_attr_##name##_show, aml_CVBS_attr_##name##_store) + + #endif diff --git a/drivers/amlogic/media/vout/cvbs/cvbs_out.c b/drivers/amlogic/media/vout/cvbs/cvbs_out.c index b125c1e..5961223 100644 --- a/drivers/amlogic/media/vout/cvbs/cvbs_out.c +++ b/drivers/amlogic/media/vout/cvbs/cvbs_out.c @@ -98,7 +98,13 @@ static struct vinfo_s cvbs_info[] = { static struct disp_module_info_s disp_module_info; static struct disp_module_info_s *info; +static enum cvbs_mode_e local_cvbs_mode; +static unsigned int vdac_cfg_valid; +static unsigned int vdac_cfg_value; +static DEFINE_MUTEX(setmode_mutex); +static DEFINE_MUTEX(CC_mutex); +static int cvbs_vdac_power_level; static void vdac_power_level_store(char *para); SET_CVBS_CLASS_ATTR(vdac_power_level, vdac_power_level_store); @@ -112,19 +118,12 @@ struct class_attribute class_CVBS_attr_wss = __ATTR(wss, 0644, aml_CVBS_attr_wss_show, aml_CVBS_attr_wss_store); #endif /*CONFIG_AMLOGIC_WSS*/ -static int cvbs_vdac_power_level; - -static DEFINE_MUTEX(setmode_mutex); -static DEFINE_MUTEX(CC_mutex); - -static enum cvbs_mode_e local_cvbs_mode; static void cvbs_config_vdac(unsigned int flag, unsigned int cfg); - +static void cvbs_cntl_output(unsigned int open); +static void cvbs_performance_config(unsigned int index); #ifdef CONFIG_CVBS_PERFORMANCE_COMPATIBILITY_SUPPORT static void cvbs_performance_enhancement(enum cvbs_mode_e mode); #endif -static void cvbs_cntl_output(unsigned int open); -static void cvbs_performance_config(unsigned int index); #if 0 static int get_vdac_power_level(void) @@ -148,7 +147,12 @@ static int check_cpu_type(unsigned int cpu_type) * } */ -static unsigned int vdac_cfg_valid = 0, vdac_cfg_value; +int cvbs_cpu_type(void) +{ + return info->cvbs_data->cpu_id; +} +EXPORT_SYMBOL(cvbs_cpu_type); + static unsigned int cvbs_get_trimming_version(unsigned int flag) { unsigned int version = 0xff; @@ -798,6 +802,10 @@ static void cvbs_performance_regs_dump(void) HHI_VDAC_CNTL0, HHI_VDAC_CNTL1 }; + unsigned int performance_regs_vdac_g12a[] = { + HHI_VDAC_CNTL0_G12A, + HHI_VDAC_CNTL1_G12A + }; int i, size; size = sizeof(performance_regs_enci)/sizeof(unsigned int); @@ -806,12 +814,19 @@ static void cvbs_performance_regs_dump(void) pr_info("vcbus [0x%x] = 0x%x\n", performance_regs_enci[i], cvbs_out_reg_read(performance_regs_enci[i])); } - - size = sizeof(performance_regs_vdac)/sizeof(unsigned int); + if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A) + size = sizeof(performance_regs_vdac_g12a)/sizeof(unsigned int); + else + size = sizeof(performance_regs_vdac)/sizeof(unsigned int); pr_info("------------------------\n"); for (i = 0; i < size; i++) { - pr_info("hiu [0x%x] = 0x%x\n", performance_regs_vdac[i], - cvbs_out_hiu_read(performance_regs_vdac[i])); + if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A) + pr_info("hiu [0x%x] = 0x%x\n", + performance_regs_vdac_g12a[i], + cvbs_out_hiu_read(performance_regs_vdac_g12a[i])); + else + pr_info("hiu [0x%x] = 0x%x\n", performance_regs_vdac[i], + cvbs_out_hiu_read(performance_regs_vdac[i])); } pr_info("------------------------\n"); } @@ -1261,22 +1276,28 @@ static void cvbsout_clktree_remove(struct device *dev) #ifdef CONFIG_OF struct meson_cvbsout_data meson_gxl_cvbsout_data = { .cntl0_val = 0xb0001, - .cpu_id = CPU_TYPE_GXL, + .cpu_id = CVBS_CPU_TYPE_GXL, .name = "meson-gxl-cvbsout", }; struct meson_cvbsout_data meson_gxm_cvbsout_data = { .cntl0_val = 0xb0001, - .cpu_id = CPU_TYPE_GXM, + .cpu_id = CVBS_CPU_TYPE_GXM, .name = "meson-gxm-cvbsout", }; struct meson_cvbsout_data meson_txlx_cvbsout_data = { .cntl0_val = 0x620001, - .cpu_id = CPU_TYPE_TXLX, + .cpu_id = CVBS_CPU_TYPE_TXLX, .name = "meson-txlx-cvbsout", }; +struct meson_cvbsout_data meson_g12a_cvbsout_data = { + .cntl0_val = 0x906001, + .cpu_id = CVBS_CPU_TYPE_G12A, + .name = "meson-g12a-cvbsout", +}; + static const struct of_device_id meson_cvbsout_dt_match[] = { { .compatible = "amlogic, cvbsout-gxl", @@ -1287,6 +1308,9 @@ static const struct of_device_id meson_cvbsout_dt_match[] = { }, { .compatible = "amlogic, cvbsout-txlx", .data = &meson_txlx_cvbsout_data, + }, { + .compatible = "amlogic, cvbsout-g12a", + .data = &meson_g12a_cvbsout_data, }, {}, }; diff --git a/drivers/amlogic/media/vout/cvbs/cvbs_out.h b/drivers/amlogic/media/vout/cvbs/cvbs_out.h index e980c69..1d2dfef 100644 --- a/drivers/amlogic/media/vout/cvbs/cvbs_out.h +++ b/drivers/amlogic/media/vout/cvbs/cvbs_out.h @@ -37,45 +37,17 @@ #define print_info(fmt, args...) pr_info(fmt, ##args) -ssize_t show_info(char *name, char *buf); -inline ssize_t show_info(char *name, char *buf) -{ - return snprintf(buf, 40, "%s\n", name); -} - -#define STORE_INFO(name) \ - {mutex_lock(&cvbs_mutex);\ - snprintf(name, 40, "%s", buf) ;\ - mutex_unlock(&cvbs_mutex); } - -#define SET_CVBS_CLASS_ATTR(name, op) \ -static char name[40]; \ -static ssize_t aml_CVBS_attr_##name##_show(struct class *cla, \ - struct class_attribute *attr, char *buf) \ -{ \ - return show_info(name, buf); \ -} \ -static ssize_t aml_CVBS_attr_##name##_store(struct class *cla, \ - struct class_attribute *attr, \ - const char *buf, size_t count) \ -{ \ - STORE_INFO(name); \ - op(name); \ - return strnlen(buf, count); \ -} \ -struct class_attribute class_CVBS_attr_##name = \ -__ATTR(name, 0644, \ - aml_CVBS_attr_##name##_show, aml_CVBS_attr_##name##_store) - struct reg_s { unsigned int reg; unsigned int val; }; enum cvbs_cpu_type { - CPU_TYPE_GXL = 0, - CPU_TYPE_GXM = 1, - CPU_TYPE_TXLX = 2, + CVBS_CPU_TYPE_GXTVBB = 0, + CVBS_CPU_TYPE_GXL = 1, + CVBS_CPU_TYPE_GXM = 2, + CVBS_CPU_TYPE_TXLX = 3, + CVBS_CPU_TYPE_G12A = 4, }; struct meson_cvbsout_data { @@ -122,4 +94,5 @@ struct cvbsregs_set_t { const struct reg_s *enc_reg_setting; }; + #endif diff --git a/drivers/amlogic/media/vout/cvbs/cvbs_out_reg.h b/drivers/amlogic/media/vout/cvbs/cvbs_out_reg.h index b410fff..f3e6d3e 100644 --- a/drivers/amlogic/media/vout/cvbs/cvbs_out_reg.h +++ b/drivers/amlogic/media/vout/cvbs/cvbs_out_reg.h @@ -114,6 +114,8 @@ #define HHI_HDMI_PLL_CNTL4 0xcb #define HHI_HDMI_PLL_CNTL5 0xcc #define HHI_HDMI_PLL_CNTL6 0xcd +/*G12A*/ +#define HHI_HDMI_PLL_CNTL7 0xce #define HHI_DSI_LVDS_EDP_CNTL0 0xd1 #define HHI_DSI_LVDS_EDP_CNTL1 0xd2 @@ -135,6 +137,8 @@ #define HHI_VDAC_CNTL0 0xbd #define HHI_VDAC_CNTL1 0xbe +#define HHI_VDAC_CNTL0_G12A 0xbb +#define HHI_VDAC_CNTL1_G12A 0xbc /********************************* * HIU: GXBB diff --git a/drivers/amlogic/media/vout/cvbs/enc_clk_config.c b/drivers/amlogic/media/vout/cvbs/enc_clk_config.c index 9c190d4..0fdec2d 100644 --- a/drivers/amlogic/media/vout/cvbs/enc_clk_config.c +++ b/drivers/amlogic/media/vout/cvbs/enc_clk_config.c @@ -26,16 +26,16 @@ #include /* Local Headers */ +#include "cvbs_out.h" #include "enc_clk_config.h" #include "cvbs_out_reg.h" -#include "cvbs_log.h" static DEFINE_MUTEX(setclk_mutex); static int hpll_wait_lock(unsigned int reg, unsigned int lock_bit) { unsigned int pll_lock; - int wait_loop = 200; + int wait_loop = 2000; int ret = 0; do { @@ -61,22 +61,21 @@ static void disable_hpll_clk_out(void) cvbs_out_hiu_setb(HHI_VID_PLL_CLK_DIV, 0, 19, 1); /* close hpll */ - cvbs_out_hiu_setb(HHI_HDMI_PLL_CNTL, 0, 30, 1); + if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A) + cvbs_out_hiu_setb(HHI_HDMI_PLL_CNTL, 0, 28, 1); + else + cvbs_out_hiu_setb(HHI_HDMI_PLL_CNTL, 0, 30, 1); } void set_vmode_clk(void) { int ret; - cvbs_log_info("set_vmode_clk start\n"); + pr_info("set_vmode_clk start\n"); mutex_lock(&setclk_mutex); - if (is_meson_gxbb_cpu() || - is_meson_gxtvbb_cpu()) { + if (cvbs_cpu_type() == CVBS_CPU_TYPE_GXTVBB) { cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x5800023d); - if (is_meson_gxbb_cpu()) - cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL2, 0x00404e00); - else - cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL2, 0x00404380); + cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL2, 0x00404380); cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL3, 0x0d5c5091); cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL4, 0x801da72c); cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL5, 0x71486980); @@ -87,7 +86,22 @@ void set_vmode_clk(void) pr_info("[error]: hdmi_pll lock failed\n"); cvbs_out_hiu_setb(HHI_VIID_CLK_CNTL, 0, VCLK2_EN, 1); udelay(5); - } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_GXL)) { + } else if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A) { + pr_info("config g12a hpll\n"); + cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x3b00047b); + cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL2, 0x00018000); + cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL3, 0x00000000); + cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL4, 0x0a691c00); + cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL5, 0x33771290); + cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL6, 0x39270000); + cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL7, 0x50540000); + cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x1b00047b); + ret = hpll_wait_lock(HHI_HDMI_PLL_CNTL, 31); + if (ret) + pr_info("[error]:hdmi_pll lock failed\n"); + msleep(100); + cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x1b01047b); + } else { cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x4000027b); cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL2, 0x800cb300); cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL3, 0xa6212844); @@ -99,10 +113,9 @@ void set_vmode_clk(void) ret = hpll_wait_lock(HHI_HDMI_PLL_CNTL, 31); if (ret) pr_info("[error]: hdmi_pll lock failed\n"); - } else { - cvbs_log_err("Set clk.cpu_type unsupport.\n"); - goto LAB_OUT; } + + /* divider: 1 */ /* clk div */ cvbs_out_hiu_setb(HHI_VID_PLL_CLK_DIV, 0, 19, 1); cvbs_out_hiu_setb(HHI_VID_PLL_CLK_DIV, 0, 15, 1); @@ -114,9 +127,11 @@ void set_vmode_clk(void) cvbs_out_hiu_setb(HHI_VIID_CLK_DIV, (55 - 1), VCLK2_XD, 8); udelay(5); /* Bit[18:16] - v2_cntl_clk_in_sel */ - cvbs_out_hiu_setb(HHI_VIID_CLK_CNTL, 4, VCLK2_CLK_IN_SEL, 3); + /*before g12a set 4 and 0 all ok,after g12a must set 0*/ + cvbs_out_hiu_setb(HHI_VIID_CLK_CNTL, 0, VCLK2_CLK_IN_SEL, 3); cvbs_out_hiu_setb(HHI_VIID_CLK_CNTL, 1, VCLK2_EN, 1); udelay(2); + /* vclk: 27M */ /* [15:12] encl_clk_sel, select vclk2_div1 */ cvbs_out_hiu_setb(HHI_VID_CLK_DIV, 8, 28, 4); cvbs_out_hiu_setb(HHI_VIID_CLK_DIV, 8, 28, 4); @@ -131,9 +146,8 @@ void set_vmode_clk(void) cvbs_out_hiu_setb(HHI_VID_CLK_CNTL2, 1, 0, 1); cvbs_out_hiu_setb(HHI_VID_CLK_CNTL2, 1, 4, 1); -LAB_OUT: mutex_unlock(&setclk_mutex); - cvbs_log_info("set_vmode_clk DONE\n"); + pr_info("set_vmode_clk DONE\n"); } void disable_vmode_clk(void) diff --git a/drivers/amlogic/media/vout/cvbs/enc_clk_config.h b/drivers/amlogic/media/vout/cvbs/enc_clk_config.h index 101a3d1..7964e08 100644 --- a/drivers/amlogic/media/vout/cvbs/enc_clk_config.h +++ b/drivers/amlogic/media/vout/cvbs/enc_clk_config.h @@ -20,5 +20,6 @@ void set_vmode_clk(void); extern void disable_vmode_clk(void); +extern int cvbs_cpu_type(void); #endif diff --git a/drivers/amlogic/media/vout/vdac/vdac_dev.c b/drivers/amlogic/media/vout/vdac/vdac_dev.c index e7989e4..f1c8e19 100644 --- a/drivers/amlogic/media/vout/vdac/vdac_dev.c +++ b/drivers/amlogic/media/vout/vdac/vdac_dev.c @@ -56,6 +56,8 @@ static struct mutex vdac_mutex; #define HHI_VDAC_CNTL0 0xbd #define HHI_VDAC_CNTL1 0xbe +#define HHI_VDAC_CNTL0_G12A 0xbb +#define HHI_VDAC_CNTL1_G12A 0xbc #define VDAC_MODULE_ATV_DEMOD 0x1 #define VDAC_MODULE_DTV_DEMOD 0x2 @@ -170,6 +172,8 @@ void ana_ref_cntl0_bit9(bool on, unsigned int module_sel) if (is_meson_txlx_cpu()) vdac_hiu_reg_setb(HHI_VDAC_CNTL0, enable, 9, 1); + else if (is_meson_g12a_cpu()) + vdac_hiu_reg_setb(HHI_VDAC_CNTL0_G12A, ~enable, 9, 1); else vdac_hiu_reg_setb(HHI_VDAC_CNTL0, ~enable, 9, 1); } @@ -182,6 +186,10 @@ void vdac_out_cntl0_bit10(bool on, unsigned int module_sel) { bool enable = 0; + /*bit10 is for bandgap startup setting in g12a*/ + if (is_meson_g12a_cpu()) + return; + switch (module_sel & 0xf) { case VDAC_MODULE_ATV_DEMOD: /* dtv demod */ if (on) @@ -265,7 +273,10 @@ void vdac_out_cntl0_bit0(bool on, unsigned int module_sel) else enable = 1; - vdac_hiu_reg_setb(HHI_VDAC_CNTL0, enable, 0, 1); + if (is_meson_g12a_cpu()) + vdac_hiu_reg_setb(HHI_VDAC_CNTL0_G12A, enable, 0, 1); + else + vdac_hiu_reg_setb(HHI_VDAC_CNTL0, enable, 0, 1); } EXPORT_SYMBOL(vdac_out_cntl0_bit0); @@ -321,8 +332,13 @@ EXPORT_SYMBOL(vdac_out_cntl1_bit3); void vdac_set_ctrl0_ctrl1(unsigned int ctrl0, unsigned int ctrl1) { - vdac_hiu_reg_write(HHI_VDAC_CNTL0, ctrl0); - vdac_hiu_reg_write(HHI_VDAC_CNTL1, ctrl1); + if (is_meson_g12a_cpu()) { + vdac_hiu_reg_write(HHI_VDAC_CNTL0_G12A, ctrl0); + vdac_hiu_reg_write(HHI_VDAC_CNTL1_G12A, ctrl1); + } else { + vdac_hiu_reg_write(HHI_VDAC_CNTL0, ctrl0); + vdac_hiu_reg_write(HHI_VDAC_CNTL1, ctrl1); + } } EXPORT_SYMBOL(vdac_set_ctrl0_ctrl1); @@ -339,6 +355,7 @@ void vdac_enable(bool on, unsigned int module_sel) if (on) { ana_ref_cntl0_bit9(1, VDAC_MODULE_ATV_DEMOD); /*after txlx need reset bandgap after bit9 enabled*/ + /*bit10 reset bandgap in g12a*/ if (is_meson_txlx_cpu()) { vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 1, 13, 1); udelay(5); @@ -351,7 +368,8 @@ void vdac_enable(bool on, unsigned int module_sel) /*Cdac pwd*/ vdac_out_cntl1_bit3(1, VDAC_MODULE_ATV_DEMOD); /* enable AFE output buffer */ - vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 0, 10, 1); + if (!is_meson_g12a_cpu()) + vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 0, 10, 1); vdac_out_cntl0_bit0(1, VDAC_MODULE_ATV_DEMOD); } else { ana_ref_cntl0_bit9(0, VDAC_MODULE_ATV_DEMOD); @@ -360,7 +378,8 @@ void vdac_enable(bool on, unsigned int module_sel) break; vdac_out_cntl0_bit0(0, VDAC_MODULE_ATV_DEMOD); /* Disable AFE output buffer */ - vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 0, 10, 1); + if (!is_meson_g12a_cpu()) + vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 0, 10, 1); /* enable dac output */ vdac_out_cntl1_bit3(0, 0x4); } @@ -429,7 +448,9 @@ void vdac_enable(bool on, unsigned int module_sel) pri_flag &= ~VDAC_MODULE_CVBS_OUT; if (pri_flag & VDAC_MODULE_ATV_DEMOD) { vdac_out_cntl1_bit3(1, VDAC_MODULE_ATV_DEMOD); - vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 0, 10, 1); + if (!is_meson_g12a_cpu()) + vdac_hiu_reg_setb(HHI_VDAC_CNTL0, + 0, 10, 1); vdac_out_cntl0_bit0(1, VDAC_MODULE_ATV_DEMOD); } else if (pri_flag & VDAC_MODULE_TVAFE) { vdac_out_cntl1_bit3(0, VDAC_MODULE_TVAFE); -- 2.7.4