From f3c0366411d6893360be21a7544595bf275bc9b2 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 20 Oct 2021 12:46:56 +0300 Subject: [PATCH] ARM: dts: at91: sama7g5-ek: use blocks 0 and 1 of TCB0 as cs and ce Use blocks 0 and 1 of TCB0 for clocksource and clockevent functionality. PIT64B is already enabled on SAMA7G5 targets for this but TCB0 will be used as a fallback only in case PIT64B will fail to probe. Signed-off-by: Claudiu Beznea Signed-off-by: Nicolas Ferre Link: https://lore.kernel.org/r/20211020094656.3343242-4-claudiu.beznea@microchip.com --- arch/arm/boot/dts/at91-sama7g5ek.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts index c46be16..902036a 100644 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts @@ -654,6 +654,18 @@ status = "okay"; }; +&tcb0 { + timer0: timer@0 { + compatible = "atmel,tcb-timer"; + reg = <0>; + }; + + timer1: timer@1 { + compatible = "atmel,tcb-timer"; + reg = <1>; + }; +}; + &trng { status = "okay"; }; -- 2.7.4