From f302e0b5dd402e629620a58f9115a3441c65d60f Mon Sep 17 00:00:00 2001 From: Simon Tatham Date: Tue, 25 Jan 2022 10:37:19 +0000 Subject: [PATCH] [AArch64] Exclude optional features from HasV8_0rOps. The following SubtargetFeatures are removed from the definition of HasV8_0rOps, on the grounds that they are optional in Armv8.4-A, and therefore (by the definition of Armv8.0-R) also optional in v8.0-R: * performance monitoring: FeaturePerfMon * cryptography: FeatureSM4 and FeatureSHA3 * half-precision FP: FeatureFullFP16, FeatureFP16FML * speculation control: FeatureSSBS, FeaturePredRes, FeatureSB, FeatureSpecRestrict This isn't the full set of features that are listed as optional in the spec. FeatureCCIDX and FeatureTRACEV8_4 are also optional. But LLVM includes those in HasV8_3aOps and HasV8_4aOps respectively (I think on the grounds that the system registers they enable are useful to be able to access after a runtime check), and so for consistency, I've left those in HasV8_0rOps too. After this commit, HasV8_0rOps is a strict subset of HasV8_4aOps (but missing features that are not in Armv8.0-R at all). The definition of Cortex-R82 is correspondingly updated to add most of the features that I've removed from base Armv8.0-R (with the exception of the cryptography ones), since that particular implementation of v8.0-R does have them. Reviewed By: dmgreen Differential Revision: https://reviews.llvm.org/D118045 --- llvm/lib/Target/AArch64/AArch64.td | 13 ++++++------- llvm/test/MC/AArch64/armv8.2a-crypto.s | 3 ++- llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt | 3 ++- llvm/test/MC/Disassembler/AArch64/armv8.5a-predres.txt | 2 +- llvm/test/MC/Disassembler/AArch64/armv8.5a-specrestrict.txt | 2 +- llvm/test/MC/Disassembler/AArch64/armv8.5a-ssbs.txt | 2 +- llvm/test/MC/Disassembler/AArch64/armv8a-fpmul.txt | 1 - 7 files changed, 13 insertions(+), 13 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index 0a2d88c..b87468d 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -528,16 +528,13 @@ def HasV8_0rOps : SubtargetFeature< [//v8.1 FeatureCRC, FeaturePAN, FeatureRDM, FeatureLSE, FeatureCONTEXTIDREL2, //v8.2 - FeaturePerfMon, FeatureRAS, FeaturePsUAO, FeatureSM4, - FeatureSHA3, FeatureCCPP, FeatureFullFP16, FeaturePAN_RWV, + FeatureRAS, FeaturePsUAO, FeatureCCPP, FeaturePAN_RWV, //v8.3 FeatureComplxNum, FeatureCCIDX, FeatureJS, FeaturePAuth, FeatureRCPC, //v8.4 - FeatureDotProd, FeatureFP16FML, FeatureTRACEV8_4, - FeatureTLB_RMI, FeatureFlagM, FeatureDIT, FeatureSEL2, FeatureRCPC_IMMO, - //v8.5 - FeatureSSBS, FeaturePredRes, FeatureSB, FeatureSpecRestrict]>; + FeatureDotProd, FeatureTRACEV8_4, FeatureTLB_RMI, + FeatureFlagM, FeatureDIT, FeatureSEL2, FeatureRCPC_IMMO]>; //===----------------------------------------------------------------------===// // Register File Description @@ -969,7 +966,9 @@ def ProcessorFeatures { list A710 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon, FeatureETE, FeatureMTE, FeatureFP16FML, FeatureSVE2BitPerm, FeatureBF16, FeatureMatMulInt8]; - list R82 = [HasV8_0rOps]; + list R82 = [HasV8_0rOps, FeaturePerfMon, FeatureFullFP16, + FeatureFP16FML, FeatureSSBS, FeaturePredRes, + FeatureSB, FeatureSpecRestrict]; list X1 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureRCPC, FeaturePerfMon, FeatureSPE, FeatureFullFP16, FeatureDotProd]; diff --git a/llvm/test/MC/AArch64/armv8.2a-crypto.s b/llvm/test/MC/AArch64/armv8.2a-crypto.s index 8a10520..93e84d5 100644 --- a/llvm/test/MC/AArch64/armv8.2a-crypto.s +++ b/llvm/test/MC/AArch64/armv8.2a-crypto.s @@ -7,7 +7,8 @@ // RUN: not llvm-mc -triple aarch64 -show-encoding < %s 2> %t // RUN: FileCheck --check-prefix=CHECK-NO-SHA --check-prefix=CHECK-NO-SM < %t %s -// RUN: llvm-mc -triple aarch64 -mattr=+v8r -show-encoding -o - %s | FileCheck %s --check-prefixes=CHECK-SM,CHECK-SHA +// RUN: not llvm-mc -triple aarch64 -mattr=+v8r -show-encoding -o - %s < %s 2> %t +// RUN: FileCheck --check-prefix=CHECK-NO-SHA --check-prefix=CHECK-NO-SM < %t %s sha512h q0, q1, v2.2d sha512h2 q0, q1, v2.2d diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt b/llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt index b62d424..f920639 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt @@ -1,7 +1,8 @@ # RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.3a,-fullfp16 --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK # RUN: FileCheck %s < %t --check-prefix=NO-FP16 # RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.3a,+fullfp16 --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 -# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 +# RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK +# RUN: FileCheck %s < %t --check-prefix=NO-FP16 # RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=-v8.3a,+fullfp16 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=NO-V83A ###### FCMLA vector diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.5a-predres.txt b/llvm/test/MC/Disassembler/AArch64/armv8.5a-predres.txt index 45bb17b..e1b10b1 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8.5a-predres.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8.5a-predres.txt @@ -1,6 +1,6 @@ # RUN: llvm-mc -triple=aarch64 -mattr=+predres -disassemble < %s | FileCheck %s # RUN: llvm-mc -triple=aarch64 -mattr=+v8.5a -disassemble < %s | FileCheck %s -# RUN: llvm-mc -triple=aarch64 -mattr=+v8r -disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple=aarch64 -mattr=+v8r -disassemble < %s | FileCheck %s --check-prefix=NOSB # RUN: llvm-mc -triple=aarch64 -mattr=-predres -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOSB [0x80 0x73 0x0b 0xd5] diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.5a-specrestrict.txt b/llvm/test/MC/Disassembler/AArch64/armv8.5a-specrestrict.txt index 8662b90..3301680 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8.5a-specrestrict.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8.5a-specrestrict.txt @@ -1,6 +1,6 @@ # RUN: llvm-mc -triple=aarch64 -mattr=+specrestrict -disassemble < %s | FileCheck %s # RUN: llvm-mc -triple=aarch64 -mattr=+v8.5a -disassemble < %s | FileCheck %s -# RUN: llvm-mc -triple=aarch64 -mattr=+v8r -disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple=aarch64 -mattr=+v8r -disassemble < %s | FileCheck %s --check-prefix=NOSPECID # RUN: llvm-mc -triple=aarch64 -mattr=-specrestrict -disassemble < %s | FileCheck %s --check-prefix=NOSPECID [0x81 0x03 0x38 0xd5] diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.5a-ssbs.txt b/llvm/test/MC/Disassembler/AArch64/armv8.5a-ssbs.txt index 3efec07..7698751 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8.5a-ssbs.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8.5a-ssbs.txt @@ -2,7 +2,7 @@ # RUN: llvm-mc -triple=aarch64 -mattr=+v8.5a -disassemble < %s | FileCheck %s # RUN: llvm-mc -triple=aarch64 -mcpu=cortex-a76 -disassemble < %s | FileCheck %s # RUN: llvm-mc -triple=aarch64 -mcpu=cortex-a76ae -disassemble < %s | FileCheck %s -# RUN: llvm-mc -triple=aarch64 -mattr=+v8r -disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple=aarch64 -mattr=+v8r -disassemble < %s | FileCheck %s --check-prefix=NOSPECID # RUN: llvm-mc -triple=aarch64 -mattr=-ssbs -disassemble < %s | FileCheck %s --check-prefix=NOSPECID [0x3f 0x41 0x03 0xd5] diff --git a/llvm/test/MC/Disassembler/AArch64/armv8a-fpmul.txt b/llvm/test/MC/Disassembler/AArch64/armv8a-fpmul.txt index 57520c9..5265df1 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8a-fpmul.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8a-fpmul.txt @@ -1,6 +1,5 @@ # RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+fp16fml --disassemble < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,FP16 # RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=-fullfp16,+fp16fml --disassemble < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,FP16 -# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r --disassemble < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,FP16 #A fullfp16 instruction, for testing the interaction of the features [0x41,0x08,0xe3,0x1e] -- 2.7.4